Commit 7f4f35ea authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo/ga100-: initial support 



- replaces the hacked-up version that existed solely to support TTM

v2. remove earlier hack preventing use of non-stall intr for fences

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 05d271c3

drivers/gpu/drm/nouveau/include/nvif/class.h

+1 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ 
#define PASCAL_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c06f

#define VOLTA_CHANNEL_GPFIFO_A                        /* if0020.h */ 0x0000c36f

#define TURING_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c46f

#define AMPERE_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c56f

#define AMPERE_CHANNEL_GPFIFO_B                       /* if0020.h */ 0x0000c76f



#define NV50_DISP                                     /* if0010.h */ 0x00005070

drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ struct nvkm_fifo { 
	struct {

#define NVKM_FIFO_NONSTALL_EVENT BIT(0)

		struct nvkm_event event;

		struct nvkm_inth intr;

	} nonstall;



	struct {
@@ -92,5 +93,6 @@ int gm200_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct 
int gp100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);

int gv100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);

int tu102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);

int ga100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);

int ga102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);

#endif

drivers/gpu/drm/nouveau/nouveau_chan.c

+2 −2
Original line number Diff line number Diff line
@@ -253,6 +253,7 @@ nouveau_channel_ctor(struct nouveau_drm *drm, struct nvif_device *device, bool p 
		int version;

	} hosts[] = {

		{  AMPERE_CHANNEL_GPFIFO_B, 0 },

		{  AMPERE_CHANNEL_GPFIFO_A, 0 },

		{  TURING_CHANNEL_GPFIFO_A, 0 },

		{   VOLTA_CHANNEL_GPFIFO_A, 0 },

		{  PASCAL_CHANNEL_GPFIFO_A, 0 },
@@ -365,8 +366,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) 
	if (ret)

		return ret;



	if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO &&

	    chan->user.oclass < AMPERE_CHANNEL_GPFIFO_B) {

	if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) {

		struct {

			struct nvif_event_v0 base;

			struct nvif_chan_event_v0 host;

drivers/gpu/drm/nouveau/nouveau_drm.c

+1 −3
Original line number Diff line number Diff line
@@ -348,9 +348,6 @@ nouveau_accel_gr_init(struct nouveau_drm *drm) 
	u64 runm;

	int ret;



	if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)

		return;



	/* Allocate channel that has access to the graphics engine. */

	runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);

	if (!runm) {
@@ -473,6 +470,7 @@ nouveau_accel_init(struct nouveau_drm *drm) 
		case PASCAL_CHANNEL_GPFIFO_A:

		case VOLTA_CHANNEL_GPFIFO_A:

		case TURING_CHANNEL_GPFIFO_A:

		case AMPERE_CHANNEL_GPFIFO_A:

		case AMPERE_CHANNEL_GPFIFO_B:

			ret = nvc0_fence_create(drm);

			break;

drivers/gpu/drm/nouveau/nv84_fence.c

+1 −1
Original line number Diff line number Diff line
@@ -210,7 +210,7 @@ nv84_fence_create(struct nouveau_drm *drm) 
	priv->base.context_new = nv84_fence_context_new;

	priv->base.context_del = nv84_fence_context_del;



	priv->base.uevent = drm->client.device.info.family < NV_DEVICE_INFO_V0_AMPERE;

	priv->base.uevent = true;



	mutex_init(&priv->mutex);