Commit 7f44571b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2022-02-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



Linux core:
-----------
iosys-map: Add offset to iosys_map_memcpy_to() (Lucas)
iosys-map: Add a few more helpers (Lucas)

i915 (display and core changes on drm-intel-next):
--------------------------------------------------

- Display's DBuf and watermark related fixes and improvements (Ville)
- More i915 header and other code clean-up (Jani)
- Display IPS fixes and improvements (Ville)
- OPRegion fixes and cleanups (Jani)
- Fix the plane end Y offset check for FBC (Ville)
- DP 128b/132b updates (Jani)
- Disable runtime pm wakeref tracking for the mock device selftest (Ville)
- Many display code clean-up while targeting to fix up DP DFP 4:2:0 handling (Ville)
- Bigjoiner state tracking and more bigjoiner related work (Ville)
- Update DMC_DEBUG3 register for DG1 (Chuansheng)
- SAGV fixes (Ville)
- More GT register cleanup (Matt)
- Fix build issue when using clang (Tong)
- Display DG2 fixes (Matt)
- ADL-P PHY related fixes (Imre)
- PSR2 fixes (Jose)
- Add PCH Support for Alder Lake N (Tejas)

drm-intel-gt-next (drm-intel-gt-next-2022-02-17):
-------------------------------------------------
UAPI Changes:

- Weak parallel submission support for execlists

  Minimal implementation of the parallel submission support for
  execlists backend that was previously only implemented for GuC.
  Support one sibling non-virtual engine.

Core Changes:

- Two backmerges of drm/drm-next for header file renames/changes and
  i915_regs reorganization

Driver Changes:

- Add new DG2 subplatform: DG2-G12 (Matt R)
- Add new DG2 workarounds (Matt R, Ram, Bruce)
- Handle pre-programmed WOPCM registers for DG2+ (Daniele)
- Update guc shim control programming on XeHP SDV+ (Daniele)
- Add RPL-S C0/D0 stepping information (Anusha)
- Improve GuC ADS initialization to work on ARM64 on dGFX (Lucas)

- Fix KMD and GuC race on accessing PMU busyness (Umesh)
- Use PM timestamp instead of RING TIMESTAMP for reference in PMU with GuC (Umesh)
- Report error on invalid reset notification from GuC (John)
- Avoid WARN splat by holding RPM wakelock during PXP unbind (Juston)
- Fixes to parallel submission implementation (Matt B.)
- Improve GuC loading status check/error reports (John)
- Tweak TTM LRU priority hint selection (Matt A.)
- Align the plane_vma to min_page_size of stolen mem (Ram)

- Introduce vma resources and implement async unbinding (Thomas)
- Use struct vma_resource instead of struct vma_snapshot (Thomas)
- Return some TTM accel move errors instead of trying memcpy move (Thomas)
- Fix a race between vma / object destruction and unbinding (Thomas)
- Remove short-term pins from execbuf (Maarten)
- Update to GuC version 69.0.3 (John, Michal Wa.)
- Improvements to GT reset paths in GuC backend (Matt B.)
- Use shrinker_release_pages instead of writeback in shmem object hooks (Matt A., Tvrtko)
- Use trylock instead of blocking lock when freeing GEM objects (Maarten)
- Allocate intel_engine_coredump_alloc with ALLOW_FAIL (Matt B.)
- Fixes to object unmapping and purging (Matt A)
- Check for wedged device in GuC backend (John)
- Avoid lockdep splat by locking dpt_obj around set_cache_level (Maarten)
- Allow dead vm to unbind vma's without lock (Maarten)
- s/engine->i915/i915/ for DG2 engine workarounds (Matt R)

- Use to_gt() helper for GGTT accesses (Michal Wi.)
- Selftest improvements (Matt B., Thomas, Ram)
- Coding style and compiler warning fixes (Matt B., Jasmine, Andi, Colin, Gustavo, Dan)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YhbDan8wNZBR6FzF@intel.com
parents 0a131b69 30424eba

Documentation/gpu/i915.rst

+1 −0
Original line number Diff line number Diff line
@@ -539,6 +539,7 @@ GuC ABI 
.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h

.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h



HuC

---

drivers/gpu/drm/dp/drm_dp.c

+83 −0
Original line number Diff line number Diff line
@@ -144,6 +144,69 @@ u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE], 
}

EXPORT_SYMBOL(drm_dp_get_adjust_tx_ffe_preset);



/* DP 2.0 errata for 128b/132b */

bool drm_dp_128b132b_lane_channel_eq_done(const u8 link_status[DP_LINK_STATUS_SIZE],

					  int lane_count)

{

	u8 lane_align, lane_status;

	int lane;



	lane_align = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);

	if (!(lane_align & DP_INTERLANE_ALIGN_DONE))

		return false;



	for (lane = 0; lane < lane_count; lane++) {

		lane_status = dp_get_lane_status(link_status, lane);

		if (!(lane_status & DP_LANE_CHANNEL_EQ_DONE))

			return false;

	}

	return true;

}

EXPORT_SYMBOL(drm_dp_128b132b_lane_channel_eq_done);



/* DP 2.0 errata for 128b/132b */

bool drm_dp_128b132b_lane_symbol_locked(const u8 link_status[DP_LINK_STATUS_SIZE],

					int lane_count)

{

	u8 lane_status;

	int lane;



	for (lane = 0; lane < lane_count; lane++) {

		lane_status = dp_get_lane_status(link_status, lane);

		if (!(lane_status & DP_LANE_SYMBOL_LOCKED))

			return false;

	}

	return true;

}

EXPORT_SYMBOL(drm_dp_128b132b_lane_symbol_locked);



/* DP 2.0 errata for 128b/132b */

bool drm_dp_128b132b_eq_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE])

{

	u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);



	return status & DP_128B132B_DPRX_EQ_INTERLANE_ALIGN_DONE;

}

EXPORT_SYMBOL(drm_dp_128b132b_eq_interlane_align_done);



/* DP 2.0 errata for 128b/132b */

bool drm_dp_128b132b_cds_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE])

{

	u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);



	return status & DP_128B132B_DPRX_CDS_INTERLANE_ALIGN_DONE;

}

EXPORT_SYMBOL(drm_dp_128b132b_cds_interlane_align_done);



/* DP 2.0 errata for 128b/132b */

bool drm_dp_128b132b_link_training_failed(const u8 link_status[DP_LINK_STATUS_SIZE])

{

	u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);



	return status & DP_128B132B_LT_FAILED;

}

EXPORT_SYMBOL(drm_dp_128b132b_link_training_failed);



u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],

					 unsigned int lane)

{
@@ -281,6 +344,26 @@ int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIV 
}

EXPORT_SYMBOL(drm_dp_read_channel_eq_delay);



/* Per DP 2.0 Errata */

int drm_dp_128b132b_read_aux_rd_interval(struct drm_dp_aux *aux)

{

	int unit;

	u8 val;



	if (drm_dp_dpcd_readb(aux, DP_128B132B_TRAINING_AUX_RD_INTERVAL, &val) != 1) {

		drm_err(aux->drm_dev, "%s: failed rd interval read\n",

			aux->name);

		/* default to max */

		val = DP_128B132B_TRAINING_AUX_RD_INTERVAL_MASK;

	}



	unit = (val & DP_128B132B_TRAINING_AUX_RD_INTERVAL_1MS_UNIT) ? 1 : 2;

	val &= DP_128B132B_TRAINING_AUX_RD_INTERVAL_MASK;



	return (val + 1) * unit * 1000;

}

EXPORT_SYMBOL(drm_dp_128b132b_read_aux_rd_interval);



void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,

					    const u8 dpcd[DP_RECEIVER_CAP_SIZE])

{

drivers/gpu/drm/drm_cache.c

+1 −1
Original line number Diff line number Diff line
@@ -221,7 +221,7 @@ static void memcpy_fallback(struct iosys_map *dst, 
	if (!dst->is_iomem && !src->is_iomem) {

		memcpy(dst->vaddr, src->vaddr, len);

	} else if (!src->is_iomem) {

		iosys_map_memcpy_to(dst, src->vaddr, len);

		iosys_map_memcpy_to(dst, 0, src->vaddr, len);

	} else if (!dst->is_iomem) {

		memcpy_fromio(dst->vaddr, src->vaddr_iomem, len);

	} else {

drivers/gpu/drm/drm_fb_helper.c

+1 −1
Original line number Diff line number Diff line
@@ -385,7 +385,7 @@ static void drm_fb_helper_damage_blit_real(struct drm_fb_helper *fb_helper, 
	iosys_map_incr(dst, offset); /* go to first pixel within clip rect */



	for (y = clip->y1; y < clip->y2; y++) {

		iosys_map_memcpy_to(dst, src, len);

		iosys_map_memcpy_to(dst, 0, src, len);

		iosys_map_incr(dst, fb->pitches[0]);

		src += fb->pitches[0];

	}

drivers/gpu/drm/i915/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
# will most likely get a sudden build breakage... Hopefully we will fix

# new warnings before CI updates!

subdir-ccflags-y := -Wall -Wextra

subdir-ccflags-y += -Wno-format-security

subdir-ccflags-y += -Wno-unused-parameter

subdir-ccflags-y += -Wno-type-limits

subdir-ccflags-y += -Wno-missing-field-initializers
@@ -174,7 +175,7 @@ i915-y += \ 
	  i915_trace_points.o \

	  i915_ttm_buddy_manager.o \

	  i915_vma.o \

	  i915_vma_snapshot.o \

	  i915_vma_resource.o \

	  intel_wopcm.o



# general-purpose microcontroller (GuC) support
@@ -197,6 +198,7 @@ i915-y += gt/uc/intel_uc.o \ 


# modesetting core code

i915-y += \

	display/hsw_ips.o \

	display/intel_atomic.o \

	display/intel_atomic_plane.o \

	display/intel_audio.o \