Loading drivers/net/mv643xx_eth.c +10 −10 Original line number Diff line number Diff line Loading @@ -1831,14 +1831,14 @@ static void phy_reset(struct mv643xx_eth_private *mp) { unsigned int data; smi_reg_read(mp, mp->phy_addr, 0, &data); data |= 0x8000; smi_reg_write(mp, mp->phy_addr, 0, data); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); data |= BMCR_RESET; smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); do { udelay(1); smi_reg_read(mp, mp->phy_addr, 0, &data); } while (data & 0x8000); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); } while (data & BMCR_RESET); } static void port_start(struct mv643xx_eth_private *mp) Loading Loading @@ -2385,14 +2385,14 @@ static int phy_detect(struct mv643xx_eth_private *mp) unsigned int data; unsigned int data2; smi_reg_read(mp, mp->phy_addr, 0, &data); smi_reg_write(mp, mp->phy_addr, 0, data ^ 0x1000); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); smi_reg_write(mp, mp->phy_addr, MII_BMCR, data ^ BMCR_ANENABLE); smi_reg_read(mp, mp->phy_addr, 0, &data2); if (((data ^ data2) & 0x1000) == 0) smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data2); if (((data ^ data2) & BMCR_ANENABLE) == 0) return -ENODEV; smi_reg_write(mp, mp->phy_addr, 0, data); smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); return 0; } Loading Loading
drivers/net/mv643xx_eth.c +10 −10 Original line number Diff line number Diff line Loading @@ -1831,14 +1831,14 @@ static void phy_reset(struct mv643xx_eth_private *mp) { unsigned int data; smi_reg_read(mp, mp->phy_addr, 0, &data); data |= 0x8000; smi_reg_write(mp, mp->phy_addr, 0, data); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); data |= BMCR_RESET; smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); do { udelay(1); smi_reg_read(mp, mp->phy_addr, 0, &data); } while (data & 0x8000); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); } while (data & BMCR_RESET); } static void port_start(struct mv643xx_eth_private *mp) Loading Loading @@ -2385,14 +2385,14 @@ static int phy_detect(struct mv643xx_eth_private *mp) unsigned int data; unsigned int data2; smi_reg_read(mp, mp->phy_addr, 0, &data); smi_reg_write(mp, mp->phy_addr, 0, data ^ 0x1000); smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); smi_reg_write(mp, mp->phy_addr, MII_BMCR, data ^ BMCR_ANENABLE); smi_reg_read(mp, mp->phy_addr, 0, &data2); if (((data ^ data2) & 0x1000) == 0) smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data2); if (((data ^ data2) & BMCR_ANENABLE) == 0) return -ENODEV; smi_reg_write(mp, mp->phy_addr, 0, data); smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); return 0; } Loading