Commit 7f028892 authored by Radhakrishna Sripada's avatar Radhakrishna Sripada Committed by Lucas De Marchi
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drm/i915/tgl: Introduce Tiger Lake PCH 



Add the enum additions to TGP.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: David Weinehall <david.weinehall@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-4-lucas.demarchi@intel.com
parent abd3a0fe

drivers/gpu/drm/i915/i915_drv.c

+4 −0
Original line number Diff line number Diff line
@@ -224,6 +224,10 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) 
		DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");

		WARN_ON(!IS_ELKHARTLAKE(dev_priv));

		return PCH_MCC;

	case INTEL_PCH_TGP_DEVICE_ID_TYPE:

		DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");

		WARN_ON(!IS_TIGERLAKE(dev_priv));

		return PCH_TGP;

	default:

		return PCH_NONE;

	}

drivers/gpu/drm/i915/i915_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -536,6 +536,7 @@ enum intel_pch { 
	PCH_CNP,        /* Cannon/Comet Lake PCH */

	PCH_ICP,	/* Ice Lake PCH */

	PCH_MCC,        /* Mule Creek Canyon PCH */

	PCH_TGP,	/* Tiger Lake PCH */

};



#define QUIRK_LVDS_SSC_DISABLE (1<<1)
@@ -2320,6 +2321,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, 
#define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480

#define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00

#define INTEL_PCH_MCC2_DEVICE_ID_TYPE		0x3880

#define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080

#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100

#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000

#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */
@@ -2327,6 +2329,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, 
#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)

#define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)

#define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)

#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)

#define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)

#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)

#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)