Loading drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +3 −3 Original line number Original line Diff line number Diff line Loading @@ -46,11 +46,11 @@ nv50_dac_power(struct nv50_disp_priv *priv, int or, u32 data) } } int int nv50_dac_sense(struct nv50_disp_priv *priv, int or) nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) { { const u32 doff = (or * 0x800); const u32 doff = (or * 0x800); int load = -EINVAL; int load = -EINVAL; nv_wr32(priv, 0x61a00c + doff, 0x00100000); nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); udelay(9500); udelay(9500); nv_wr32(priv, 0x61a00c + doff, 0x80000000); nv_wr32(priv, 0x61a00c + doff, 0x80000000); load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; Loading @@ -74,7 +74,7 @@ nv50_dac_mthd(struct nouveau_object *object, u32 mthd, void *args, u32 size) ret = priv->dac.power(priv, or, data[0]); ret = priv->dac.power(priv, or, data[0]); break; break; case NV50_DISP_DAC_LOAD: case NV50_DISP_DAC_LOAD: ret = priv->dac.sense(priv, or); ret = priv->dac.sense(priv, or, data[0]); if (ret >= 0) { if (ret >= 0) { data[0] = ret; data[0] = ret; ret = 0; ret = 0; Loading drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -807,6 +807,7 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 2; priv->sor.nr = 2; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading drivers/gpu/drm/nouveau/core/engine/disp/nv50.h +2 −2 Original line number Original line Diff line number Diff line Loading @@ -19,7 +19,7 @@ struct nv50_disp_priv { struct { struct { int nr; int nr; int (*power)(struct nv50_disp_priv *, int dac, u32 data); int (*power)(struct nv50_disp_priv *, int dac, u32 data); int (*sense)(struct nv50_disp_priv *, int dac); int (*sense)(struct nv50_disp_priv *, int dac, u32 load); } dac; } dac; struct { struct { int nr; int nr; Loading @@ -42,7 +42,7 @@ struct nv50_disp_priv { int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32); int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32); int nv50_dac_power(struct nv50_disp_priv *, int, u32); int nv50_dac_power(struct nv50_disp_priv *, int, u32); int nv50_dac_sense(struct nv50_disp_priv *, int); int nv50_dac_sense(struct nv50_disp_priv *, int, u32); #define SOR_MTHD(n) (n), (n) + 0x3f #define SOR_MTHD(n) (n), (n) + 0x3f Loading drivers/gpu/drm/nouveau/core/engine/disp/nv84.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -76,6 +76,7 @@ nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 2; priv->sor.nr = 2; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading drivers/gpu/drm/nouveau/core/engine/disp/nv94.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -82,6 +82,7 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 4; priv->sor.nr = 4; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading Loading
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +3 −3 Original line number Original line Diff line number Diff line Loading @@ -46,11 +46,11 @@ nv50_dac_power(struct nv50_disp_priv *priv, int or, u32 data) } } int int nv50_dac_sense(struct nv50_disp_priv *priv, int or) nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) { { const u32 doff = (or * 0x800); const u32 doff = (or * 0x800); int load = -EINVAL; int load = -EINVAL; nv_wr32(priv, 0x61a00c + doff, 0x00100000); nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); udelay(9500); udelay(9500); nv_wr32(priv, 0x61a00c + doff, 0x80000000); nv_wr32(priv, 0x61a00c + doff, 0x80000000); load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; Loading @@ -74,7 +74,7 @@ nv50_dac_mthd(struct nouveau_object *object, u32 mthd, void *args, u32 size) ret = priv->dac.power(priv, or, data[0]); ret = priv->dac.power(priv, or, data[0]); break; break; case NV50_DISP_DAC_LOAD: case NV50_DISP_DAC_LOAD: ret = priv->dac.sense(priv, or); ret = priv->dac.sense(priv, or, data[0]); if (ret >= 0) { if (ret >= 0) { data[0] = ret; data[0] = ret; ret = 0; ret = 0; Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -807,6 +807,7 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 2; priv->sor.nr = 2; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv50.h +2 −2 Original line number Original line Diff line number Diff line Loading @@ -19,7 +19,7 @@ struct nv50_disp_priv { struct { struct { int nr; int nr; int (*power)(struct nv50_disp_priv *, int dac, u32 data); int (*power)(struct nv50_disp_priv *, int dac, u32 data); int (*sense)(struct nv50_disp_priv *, int dac); int (*sense)(struct nv50_disp_priv *, int dac, u32 load); } dac; } dac; struct { struct { int nr; int nr; Loading @@ -42,7 +42,7 @@ struct nv50_disp_priv { int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32); int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32); int nv50_dac_power(struct nv50_disp_priv *, int, u32); int nv50_dac_power(struct nv50_disp_priv *, int, u32); int nv50_dac_sense(struct nv50_disp_priv *, int); int nv50_dac_sense(struct nv50_disp_priv *, int, u32); #define SOR_MTHD(n) (n), (n) + 0x3f #define SOR_MTHD(n) (n), (n) + 0x3f Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv84.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -76,6 +76,7 @@ nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 2; priv->sor.nr = 2; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv94.c +1 −0 Original line number Original line Diff line number Diff line Loading @@ -82,6 +82,7 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->dac.nr = 3; priv->dac.nr = 3; priv->sor.nr = 4; priv->sor.nr = 4; priv->dac.power = nv50_dac_power; priv->dac.power = nv50_dac_power; priv->dac.sense = nv50_dac_sense; priv->sor.power = nv50_sor_power; priv->sor.power = nv50_sor_power; INIT_LIST_HEAD(&priv->base.vblank.list); INIT_LIST_HEAD(&priv->base.vblank.list); Loading