Commit 7eb1f2c6 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Matthias Brugger
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arm64: dts: mediatek: mt6795: Add VDECSYS and VENCSYS clocks 



In prepration for adding the IOMMUs and LARBs of this SoC, add the
VDECSYS and VENCSYS clock controller nodes, providing clocks for the
vcodec stateful decoder and stateful decoder hardware.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230327083647.22017-11-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 80dd5ca5

arch/arm64/boot/dts/mediatek/mt6795.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -624,5 +624,17 @@ 
			clock-names = "source", "hclk";

			status = "disabled";

		};



		vdecsys: clock-controller@16000000 {

			compatible = "mediatek,mt6795-vdecsys";

			reg = <0 0x16000000 0 0x1000>;

			#clock-cells = <1>;

		};



		vencsys: clock-controller@18000000 {

			compatible = "mediatek,mt6795-vencsys";

			reg = <0 0x18000000 0 0x1000>;

			#clock-cells = <1>;

		};

	};

};