Commit 7e919677 authored Aug 23, 2021 by Bjorn Andersson Committed by Lorenzo Pieralisi Oct 12, 2021

PCI: dwc: Perform host_init() before registering msi

On the Qualcomm sc8180x platform the bootloader does something related
to PCI that leaves a pending "msi" interrupt, which with the current
ordering often fires before init has a chance to enable the clocks that
are necessary for the interrupt handler to access the hardware.

Move the host_init() call before the registration of the "msi" interrupt
handler to ensure the host driver has a chance to enable the clocks.

The assignment of the bridge's ops and child_ops is moved along, because
at least the TI Keystone driver overwrites these in its host_init
callback.

Link: https://lore.kernel.org/r/20210823154958.305677-1-bjorn.andersson@linaro.org

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>

parent 5b840256

drivers/pci/controller/dwc/pcie-designware-host.c

+10 −9

Original line number	Diff line number	Diff line
		@@ -335,6 +335,16 @@ int dw_pcie_host_init(struct pcie_port *pp)
		if (pci->link_gen < 1)
		pci->link_gen = of_pci_get_max_link_speed(np);

		/* Set default bus ops */
		bridge->ops = &dw_pcie_ops;
		bridge->child_ops = &dw_child_pcie_ops;

		if (pp->ops->host_init) {
		ret = pp->ops->host_init(pp);
		if (ret)
		return ret;
		}

		if (pci_msi_enabled()) {
		pp->has_msi_ctrl = !(pp->ops->msi_host_init \|\|
		of_property_read_bool(np, "msi-parent") \|\|
		@@ -388,15 +398,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
		}
		}

		/* Set default bus ops */
		bridge->ops = &dw_pcie_ops;
		bridge->child_ops = &dw_child_pcie_ops;

		if (pp->ops->host_init) {
		ret = pp->ops->host_init(pp);
		if (ret)
		goto err_free_msi;
		}
		dw_pcie_iatu_detect(pci);

		dw_pcie_setup_rc(pp);