Unverified Commit 7e609663 authored by Mark Brown's avatar Mark Brown
Browse files

Fix redundant PLLA update 

Merge series from Sameer Pujar <spujar@nvidia.com>:

This small series fixes redundant PLLA updates that happen for
each DAI link in the audio path. This helps to resolve DMIC clock
issue seen on Jetson TX2 platform.
parents 2f942690 e7658862

sound/soc/soc-utils.c

+1 −0
Original line number Diff line number Diff line
@@ -217,6 +217,7 @@ int snd_soc_dai_is_dummy(struct snd_soc_dai *dai) 
		return 1;

	return 0;

}

EXPORT_SYMBOL_GPL(snd_soc_dai_is_dummy);



int snd_soc_component_is_dummy(struct snd_soc_component *component)

{

sound/soc/tegra/tegra_audio_graph_card.c

+17 −13
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/platform_device.h>

#include <sound/graph_card.h>

#include <sound/pcm_params.h>

#include <sound/soc-dai.h>



#define MAX_PLLA_OUT0_DIV 128
@@ -44,6 +45,21 @@ struct tegra_audio_cdata { 
	unsigned int plla_out0_rates[NUM_RATE_TYPE];

};



static bool need_clk_update(struct snd_soc_dai *dai)

{

	if (snd_soc_dai_is_dummy(dai) ||

	    !dai->driver->ops ||

	    !dai->driver->name)

		return false;



	if (strstr(dai->driver->name, "I2S") ||

	    strstr(dai->driver->name, "DMIC") ||

	    strstr(dai->driver->name, "DSPK"))

		return true;



	return false;

}



/* Setup PLL clock as per the given sample rate */

static int tegra_audio_graph_update_pll(struct snd_pcm_substream *substream,

					struct snd_pcm_hw_params *params)
@@ -140,19 +156,7 @@ static int tegra_audio_graph_hw_params(struct snd_pcm_substream *substream, 
	struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);

	int err;



	/*

	 * This gets called for each DAI link (FE or BE) when DPCM is used.

	 * We may not want to update PLLA rate for each call. So PLLA update

	 * must be restricted to external I/O links (I2S, DMIC or DSPK) since

	 * they actually depend on it. I/O modules update their clocks in

	 * hw_param() of their respective component driver and PLLA rate

	 * update here helps them to derive appropriate rates.

	 *

	 * TODO: When more HW accelerators get added (like sample rate

	 * converter, volume gain controller etc., which don't really

	 * depend on PLLA) we need a better way to filter here.

	 */

	if (cpu_dai->driver->ops && rtd->dai_link->no_pcm) {

	if (need_clk_update(cpu_dai)) {

		err = tegra_audio_graph_update_pll(substream, params);

		if (err)

			return err;