Commit 7e4d2f30 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Set exit_optimized_pwr_state for DCN31 



[Why]
SMU now respects the PHY refclk disable request from driver.

This causes a hang during hotplug when PHY refclk was disabled
because it's not being re-enabled and the transmitter control
starts on dc_link_detect.

[How]
We normally would re-enable the clk with exit_optimized_pwr_state
but this is only set on DCN21 and DCN301. Set it for dcn31 as well.

This fixes DMCUB timeouts in the PHY.

Fixes: 64b1d0e8 ("drm/amd/display: Add DCN3.1 HWSEQ")

Reviewed-by: default avatarEric Yang <Eric.Yang2@amd.com>
Acked-by: default avatarPavle Kotarac <Pavle.Kotarac@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dcd10d87

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c

+1 −0
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ static const struct hw_sequencer_funcs dcn31_funcs = { 
	.z10_restore = dcn31_z10_restore,

	.z10_save_init = dcn31_z10_save_init,

	.set_disp_pattern_generator = dcn30_set_disp_pattern_generator,

	.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,

	.update_visual_confirm_color = dcn20_update_visual_confirm_color,

};