Commit 7e4a77de authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher
Browse files

drm/amdgpu: enable HDP IP v5.2.1 Clock Gating 



Enable AMD_CG_SUPPORT_HDP_MGCG and AMD_CG_SUPPORT_HDP_LS support.

Signed-off-by: default avatarTim Huang <tim.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent adcd15dc

drivers/gpu/drm/amd/amdgpu/soc21.c

+6 −0
Original line number Diff line number Diff line
@@ -598,6 +598,8 @@ static int soc21_common_early_init(void *handle) 
			AMD_CG_SUPPORT_GFX_PERF_CLK |

			AMD_CG_SUPPORT_MC_MGCG |

			AMD_CG_SUPPORT_MC_LS |

			AMD_CG_SUPPORT_HDP_MGCG |

			AMD_CG_SUPPORT_HDP_LS |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG;

		adev->pg_flags =
@@ -704,6 +706,10 @@ static int soc21_common_set_clockgating_state(void *handle, 
		adev->hdp.funcs->update_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		break;

	case IP_VERSION(7, 7, 0):

		adev->hdp.funcs->update_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		break;

	default:

		break;

	}