Loading arch/s390/kernel/dis.c +0 −6 Original line number Diff line number Diff line Loading @@ -1054,12 +1054,6 @@ static struct s390_insn opcode_b3[] = { { "fidr", 0x7f, INSTR_RRE_FF }, { "sfpc", 0x84, INSTR_RRE_RR_OPT }, { "efpc", 0x8c, INSTR_RRE_RR_OPT }, { "cefbr", 0x94, INSTR_RRE_RF }, { "cdfbr", 0x95, INSTR_RRE_RF }, { "cxfbr", 0x96, INSTR_RRE_RF }, { "cfebr", 0x98, INSTR_RRF_U0RF }, { "cfdbr", 0x99, INSTR_RRF_U0RF }, { "cfxbr", 0x9a, INSTR_RRF_U0RF }, { "cefr", 0xb4, INSTR_RRE_FR }, { "cdfr", 0xb5, INSTR_RRE_FR }, { "cxfr", 0xb6, INSTR_RRE_FR }, Loading Loading
arch/s390/kernel/dis.c +0 −6 Original line number Diff line number Diff line Loading @@ -1054,12 +1054,6 @@ static struct s390_insn opcode_b3[] = { { "fidr", 0x7f, INSTR_RRE_FF }, { "sfpc", 0x84, INSTR_RRE_RR_OPT }, { "efpc", 0x8c, INSTR_RRE_RR_OPT }, { "cefbr", 0x94, INSTR_RRE_RF }, { "cdfbr", 0x95, INSTR_RRE_RF }, { "cxfbr", 0x96, INSTR_RRE_RF }, { "cfebr", 0x98, INSTR_RRF_U0RF }, { "cfdbr", 0x99, INSTR_RRF_U0RF }, { "cfxbr", 0x9a, INSTR_RRF_U0RF }, { "cefr", 0xb4, INSTR_RRE_FR }, { "cdfr", 0xb5, INSTR_RRE_FR }, { "cxfr", 0xb6, INSTR_RRE_FR }, Loading