Commit 7e0ed53b authored by Paweł Anikiel's avatar Paweł Anikiel Committed by Dinh Nguyen
Browse files

ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi 



The Mercury+ AA1 is not a standalone board, rather it's a module
with an Arria 10 SoC. Remove status = "okay" and i2c aliases, as they
are routed to the base board and should be enabled from there.

Signed-off-by: default avatarPaweł Anikiel <pan@semihalf.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent f2906aa8

arch/arm/boot/dts/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -1148,7 +1148,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ 
	s5pv210-torbreck.dtb

dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \

	socfpga_arria5_socdk.dtb \

	socfpga_arria10_mercury_aa1.dtb \

	socfpga_arria10_socdk_nand.dtb \

	socfpga_arria10_socdk_qspi.dtb \

	socfpga_arria10_socdk_sdmmc.dtb \

arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts→arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi

+0 −28
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/dts-v1/;



#include "socfpga_arria10.dtsi"
@@ -11,8 +10,6 @@ 
	aliases {

		ethernet0 = &gmac0;

		serial1 = &uart1;

		i2c0 = &i2c0;

		i2c1 = &i2c1;

	};



	memory@0 {
@@ -43,7 +40,6 @@ 
	phy-addr = <0xffffffff>; /* probe for phy addr */



	max-frame-size = <3800>;

	status = "okay";



	phy-handle = <&phy3>;
@@ -69,22 +65,8 @@ 
	};

};



&gpio0 {

	status = "okay";

};



&gpio1 {

	status = "okay";

};



&gpio2 {

	status = "okay";

};



&i2c1 {

	status = "okay";

	isl12022: isl12022@6f {

		status = "okay";

		compatible = "isil,isl12022";

		reg = <0x6f>;

	};
@@ -92,7 +74,6 @@ 


/* Following mappings are taken from arria10 socdk dts */

&mmc {

	status = "okay";

	cap-sd-highspeed;

	broken-cd;

	bus-width = <4>;
@@ -101,12 +82,3 @@ 
&osc1 {

	clock-frequency = <33330000>;

};
 


&uart1 {

	status = "okay";

};



&usb0 {

	status = "okay";

	dr_mode = "host";

};