Unverified Commit 7d9061e0 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

drm/vc4: hdmi: Properly compute the BVB clock rate 



The BVB clock rate computation doesn't take into account a mode clock of
594MHz that we're going to need to support 4k60.

Acked-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: default avatarDave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20210507150515.257424-9-maxime@cerno.tech
parent 7c900570

drivers/gpu/drm/vc4/vc4_hdmi.c

+9 −8
Original line number Diff line number Diff line
@@ -91,7 +91,6 @@ 
# define VC4_HD_M_ENABLE			BIT(0)



#define CEC_CLOCK_FREQ 40000

#define VC4_HSM_MID_CLOCK 149985000



#define HDMI_14_MAX_TMDS_CLK   (340 * 1000 * 1000)
@@ -795,7 +794,7 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, 
		conn_state_to_vc4_hdmi_conn_state(conn_state);

	struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;

	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);

	unsigned long pixel_rate, hsm_rate;

	unsigned long bvb_rate, pixel_rate, hsm_rate;

	int ret;



	ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev);
@@ -849,12 +848,14 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, 


	vc4_hdmi_cec_update_clk_div(vc4_hdmi);



	/*

	 * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup

	 * at 300MHz.

	 */

	ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock,

			       (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));

	if (pixel_rate > 297000000)

		bvb_rate = 300000000;

	else if (pixel_rate > 148500000)

		bvb_rate = 150000000;

	else

		bvb_rate = 75000000;



	ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, bvb_rate);

	if (ret) {

		DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);

		clk_disable_unprepare(vc4_hdmi->hsm_clock);