Unverified Commit 7d8e1702 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt-5.18-1' of...

Merge tag 'mvebu-dt-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt for 5.18 (part 1)

Add new 2 bays NAS:
 - Ctera C200 V1 (kirkwood based)
 - Ctera C200 V2 (armada-370 based)

Add support for PCIe legacy INTx interrupts on Armada 385

Add PCIe proprty to limit the power on miniPCIe slots in Turris Omnia

* tag 'mvebu-dt-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: turris-omnia: Set PCIe slot-power-limit-milliwatt properties
  ARM: dts: mvebu: Add Ctera C-200 V2 board
  ARM: dts: kirkwood: Add Ctera C-200 V1 board
  dt-bindings: vendor-prefixes: Add Ctera Networks
  ARM: dts: armada-385.dtsi: Add definitions for PCIe legacy INTx interrupts

Link: https://lore.kernel.org/r/87pmn5zrd0.fsf@BL-laptop


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 94b06556 c4deb834
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+2 −0
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@@ -281,6 +281,8 @@ patternProperties:
    description: Hangzhou C-SKY Microsystems Co., Ltd
  "^csq,.*":
    description: Shenzen Chuangsiqi Technology Co.,Ltd.
  "^ctera,.*":
    description: CTERA Networks Intl.
  "^cubietech,.*":
    description: Cubietech, Ltd.
  "^cui,.*":
+2 −0
Original line number Diff line number Diff line
@@ -285,6 +285,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
dtb-$(CONFIG_MACH_KIRKWOOD) += \
	kirkwood-b3.dtb \
	kirkwood-blackarmor-nas220.dtb \
	kirkwood-c200-v1.dtb \
	kirkwood-cloudbox.dtb \
	kirkwood-d2net.dtb \
	kirkwood-db-88f6281.dtb \
@@ -1424,6 +1425,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
	zynq-zybo.dtb \
	zynq-zybo-z7.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
	armada-370-c200-v2.dtb \
	armada-370-db.dtb \
	armada-370-dlink-dns327l.dtb \
	armada-370-mirabox.dtb \
+388 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
 * Device Tree file for Ctera C200-V2
 *
 * Copyright (C) 2022 Pawel Dembicki <paweldembicki@gmail.com>
 */

/dts-v1/;

#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/leds/common.h>

/ {
	model = "Ctera C200 V2";
	compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp";

	chosen {
		bootargs = "console=ttyS0,115200";
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>; /* 1024 MB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
	};

	thermal-zones {
		ethphy-thermal {
			polling-delay = <20000>;
			polling-delay-passive = <2000>;

			thermal-sensors = <&ethphy0>;

			trips {
				ethphy_alert1: trip1 {
					temperature = <65000>;
					hysteresis = <4000>;
					type = "passive";
				};

				ethphy_crit: trip2 {
					temperature = <100000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};
		};
	};

	beeper {
		compatible = "pwm-beeper";
		pinctrl-0 = <&pmx_beeper>;
		pinctrl-names = "default";
		pwms = <&gpio1 31 4000>;
	};

	gpio-poweroff {
		compatible = "gpio-poweroff";
		pinctrl-0 = <&pmx_poweroff>;
		pinctrl-names = "default";
		gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
	};

	keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&pmx_buttons>;
		pinctrl-names = "default";

		power {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
		};

		reset {
			label = "Reset Button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
		};

		usb1 {
			label = "USB1 Button";
			linux,code = <BTN_0>;
			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
		};

		usb2 {
			label = "USB2 Button";
			linux,code = <BTN_1>;
			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
		pinctrl-names = "default";

		led-0 {
			function = LED_FUNCTION_USB;
			function-enumerator = <2>;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
		};

		led-1 {
			function = LED_FUNCTION_USB;
			function-enumerator = <2>;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
		};

		led-2 {
			function = LED_FUNCTION_USB;
			function-enumerator = <1>;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
		};

		led-3 {
			function = LED_FUNCTION_USB;
			function-enumerator = <1>;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
		};

		led-4 {
			function = LED_FUNCTION_DISK;
			function-enumerator = <2>;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
		};

		led-5 {
			function = LED_FUNCTION_DISK;
			function-enumerator = <1>;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
		};

		led-6 {
			function = LED_FUNCTION_DISK;
			function-enumerator = <2>;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
		};

		led-7 {
			function = LED_FUNCTION_INDICATOR;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
		};

		led-8 {
			function = LED_FUNCTION_DISK_ERR;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
		};

		led-9 {
			function = LED_FUNCTION_DISK_ERR;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
		};

		led-10 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
		};

		led-11 {
			function = LED_FUNCTION_DISK;
			function-enumerator = <1>;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
		};

		led-12 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
		};
	};
};

&coherencyfab {
	broken-idle;
};

&eth1 {
	pinctrl-0 = <&ge1_rgmii_pins>;
	pinctrl-names = "default";
	status = "okay";
	phy-handle = <&ethphy0>;
	phy-connection-type = "rgmii-id";
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";
	clock-frequency = <100000>;
	status = "okay";

	hwmon@2a {
		compatible = "nuvoton,nct7802";
		reg = <0x2a>;
	};

	rtc@30 {
		compatible = "sii,s35390a";
		reg = <0x30>;
	};
};

&mdio {
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";

	ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
		reg = <0>;
		#thermal-sensor-cells = <0>;
	};
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		nand-rb = <0>;
		marvell,nand-keep-config;
		nand-on-flash-bbt;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "uboot";
				reg = <0x0000000 0x200000>;
				read-only;
			};

			partition@200000 {
				label = "certificate";
				reg = <0x0200000 0x100000>;
				read-only;
			};

			partition@300000 {
				label = "preset_cfg";
				reg = <0x0300000 0x100000>;
				read-only;
			};

			partition@400000 {
				label = "dev_params";
				reg = <0x0400000 0x100000>;
				read-only;
			};
			partition@500000 {
				label = "active_bank";
				reg = <0x0500000 0x0100000>;
			};

			partition@600000 {
				label = "magic";
				reg = <0x0600000 0x0100000>;
				read-only;
			};

			partition@700000 {
				label = "bank1";
				reg = <0x0700000 0x2800000>;
			};

			partition@2f00000 {
				label = "bank2";
				reg = <0x2f00000 0x2800000>;
			};

			/* 0x5700000-0x5a00000 undefined in vendor firmware */

			partition@5a00000 {
				label = "reserved";
				reg = <0x5a00000 0x2000000>;
			};

			partition@7a00000 {
				label = "rootfs";
				reg = <0x7a00000 0x8600000>;
			};
		};
	};
};

&pciec {
	status = "okay";

	pcie@1,0 { /* Renesas uPD720202 USB 3.0 controller */
		pinctrl-0 = <&pmx_pcie>;
		pinctrl-names = "default";
		status = "okay";
		reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
	};
};

&pinctrl {
	pmx_poweroff: pmx-poweroff {
		marvell,pins = "mpp7";
		marvell,function = "gpo";
	};

	pmx_power_cpu: pmx-power-cpu {
		marvell,pins = "mpp4";
		marvell,function = "vdd";
	};

	pmx_buttons: pmx-buttons {
		marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32";
		marvell,function = "gpio";
	};

	pmx_leds1: pmx-leds1 {
		marvell,pins = "mpp47";
		marvell,function = "gpo";
	};

	pmx_leds2: pmx-leds2 {
		marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51",
			       "mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58";
		marvell,function = "gpio";
	};

	pmx_pcie: pmx-pcie {
		marvell,pins = "mpp59";
		marvell,function = "gpio";
	};

	pmx_beeper: pmx-beeper {
		marvell,pins = "mpp63";
		marvell,function = "gpio";
	};
};

&pmsu {
	pinctrl-0 = <&pmx_power_cpu>;
	pinctrl-names = "default";
};

&rtc {
	status = "disabled";
};

&sata {
	nr-ports = <2>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	hdd0_temp: sata-port@0 {
		reg = <0>;
		#thermal-sensor-cells = <0>;
	};

	hdd1_temp: sata-port@1 {
		reg = <1>;
		#thermal-sensor-cells = <0>;
	};
};

&uart0 {
	status = "okay";
};
+3 −0
Original line number Diff line number Diff line
@@ -71,16 +71,19 @@
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
				slot-power-limit-milliwatt = <10000>;
			};

			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
				slot-power-limit-milliwatt = <10000>;
			};

			pcie@3,0 {
				/* Port 2, Lane 0 */
				status = "okay";
				slot-power-limit-milliwatt = <10000>;
			};
		};
	};
+44 −8
Original line number Diff line number Diff line
@@ -69,16 +69,25 @@
				reg = <0x0800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
				interrupt-names = "intx";
				interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
				#interrupt-cells = <1>;
				ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
					  0x81000000 0 0 0x81000000 0x1 0 1 0>;
				bus-range = <0x00 0xff>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie1_intc 0>,
						<0 0 0 2 &pcie1_intc 1>,
						<0 0 0 3 &pcie1_intc 2>,
						<0 0 0 4 &pcie1_intc 3>;
				marvell,pcie-port = <0>;
				marvell,pcie-lane = <0>;
				clocks = <&gateclk 8>;
				status = "disabled";
				pcie1_intc: interrupt-controller {
					interrupt-controller;
					#interrupt-cells = <1>;
				};
			};

			/* x1 port */
@@ -88,16 +97,25 @@
				reg = <0x1000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
				interrupt-names = "intx";
				interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
				#interrupt-cells = <1>;
				ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
					  0x81000000 0 0 0x81000000 0x2 0 1 0>;
				bus-range = <0x00 0xff>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie2_intc 0>,
						<0 0 0 2 &pcie2_intc 1>,
						<0 0 0 3 &pcie2_intc 2>,
						<0 0 0 4 &pcie2_intc 3>;
				marvell,pcie-port = <1>;
				marvell,pcie-lane = <0>;
				clocks = <&gateclk 5>;
				status = "disabled";
				pcie2_intc: interrupt-controller {
					interrupt-controller;
					#interrupt-cells = <1>;
				};
			};

			/* x1 port */
@@ -107,16 +125,25 @@
				reg = <0x1800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
				interrupt-names = "intx";
				interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
				#interrupt-cells = <1>;
				ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
					  0x81000000 0 0 0x81000000 0x3 0 1 0>;
				bus-range = <0x00 0xff>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie3_intc 0>,
						<0 0 0 2 &pcie3_intc 1>,
						<0 0 0 3 &pcie3_intc 2>,
						<0 0 0 4 &pcie3_intc 3>;
				marvell,pcie-port = <2>;
				marvell,pcie-lane = <0>;
				clocks = <&gateclk 6>;
				status = "disabled";
				pcie3_intc: interrupt-controller {
					interrupt-controller;
					#interrupt-cells = <1>;
				};
			};

			/*
@@ -129,16 +156,25 @@
				reg = <0x2000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
				interrupt-names = "intx";
				interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
				#interrupt-cells = <1>;
				ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
					  0x81000000 0 0 0x81000000 0x4 0 1 0>;
				bus-range = <0x00 0xff>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie4_intc 0>,
						<0 0 0 2 &pcie4_intc 1>,
						<0 0 0 3 &pcie4_intc 2>,
						<0 0 0 4 &pcie4_intc 3>;
				marvell,pcie-port = <3>;
				marvell,pcie-lane = <0>;
				clocks = <&gateclk 7>;
				status = "disabled";
				pcie4_intc: interrupt-controller {
					interrupt-controller;
					#interrupt-cells = <1>;
				};
			};
		};
	};
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