Commit 7d7d4274 authored by Fengyan Mu's avatar Fengyan Mu Committed by Jie Liu
Browse files

Use udma's macro to isolate udma client functions 

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8GIXF


CVE: NA

--------------------------------------------------------------------

Use udma's macro CONFIG_HNS3_UDMA to isolate udma client functions in
hclge_main_c and hclgevf_main_c.

Signed-off-by: default avatarFengyan Mu <mufengyan@hisilicon.com>
parent ea647614

drivers/net/ethernet/hisilicon/hns3/Makefile

+4 −4
Original line number Diff line number Diff line
@@ -21,18 +21,18 @@ hns3-$(CONFIG_HNS3_UBL) += hns3_unic.o hns3_unic_debugfs.o 
obj-$(CONFIG_HNS3_HCLGEVF) += hclgevf.o



hclgevf-objs = hns3vf/hclgevf_main.o hns3vf/hclgevf_mbx.o  hns3vf/hclgevf_devlink.o hns3vf/hclgevf_regs.o \

		hns3_common/hclge_comm_cmd.o hns3_common/hclge_comm_rss.o hns3_common/hclge_comm_tqp_stats.o \

		hns3vf/hclgevf_udma.o

		hns3_common/hclge_comm_cmd.o hns3_common/hclge_comm_rss.o hns3_common/hclge_comm_tqp_stats.o

hclgevf-$(CONFIG_HNS3_UBL) += hns3_common/hclge_comm_unic_addr.o hns3vf/hclgevf_unic_ip.o hns3vf/hclgevf_unic_guid.o \

				hns3vf/hclgevf_unic_addr.o

hclgevf-$(CONFIG_UB_UDMA_HNS3) += hns3vf/hclgevf_udma.o



obj-$(CONFIG_HNS3_HCLGE) += hclge.o

hclge-objs = hns3pf/hclge_main.o hns3pf/hclge_mdio.o hns3pf/hclge_tm.o hns3pf/hclge_sysfs.o hns3pf/hclge_regs.o \

		hns3pf/hclge_mbx.o hns3pf/hclge_err.o  hns3pf/hclge_debugfs.o hns3pf/hclge_ptp.o hns3pf/hclge_devlink.o \

		hns3_common/hclge_comm_cmd.o hns3_common/hclge_comm_rss.o hns3_common/hclge_comm_tqp_stats.o \

		hns3pf/hclge_udma.o

		hns3_common/hclge_comm_cmd.o hns3_common/hclge_comm_rss.o hns3_common/hclge_comm_tqp_stats.o

hclge-objs += hns3pf/hclge_ext.o



hclge-$(CONFIG_HNS3_UBL) += hns3_common/hclge_comm_unic_addr.o hns3pf/hclge_unic_ip.o hns3pf/hclge_unic_guid.o \

			hns3pf/hclge_unic_addr.o

hclge-$(CONFIG_UB_UDMA_HNS3) += hns3pf/hclge_udma.o

hclge-$(CONFIG_HNS3_DCB) += hns3pf/hclge_dcb.o

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

+2 −0
Original line number Diff line number Diff line
@@ -1821,7 +1821,9 @@ int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len) 
				 hclge_read_dev(&hdev->hw, offset));

	}



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	hclge_dbg_dump_udma_rst_info(hdev, buf, len, &pos);

#endif



	pos += scnprintf(buf + pos, len - pos, "hdev state: 0x%lx\n",

			 hdev->state);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

+8 −1
Original line number Diff line number Diff line
@@ -2758,7 +2758,10 @@ void hclge_handle_all_hns_hw_errors(struct hnae3_ae_dev *ae_dev) 


bool hclge_find_error_source(struct hclge_dev *hdev)

{

	u32 msix_src_flag, hw_err_src_flag, udma_err_src_flag;

	u32 msix_src_flag, hw_err_src_flag;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	u32 udma_err_src_flag;

#endif



	msix_src_flag = hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS) &

			HCLGE_VECTOR0_REG_MSIX_MASK;
@@ -2766,10 +2769,14 @@ bool hclge_find_error_source(struct hclge_dev *hdev) 
	hw_err_src_flag = hclge_read_dev(&hdev->hw,

					 HCLGE_RAS_PF_OTHER_INT_STS_REG) &

			  HCLGE_RAS_REG_ERR_MASK;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	udma_err_src_flag = hclge_get_udma_error_reg(hdev) &

			   HCLGE_RAS_REG_ERR_MASK_UB;



	return msix_src_flag || hw_err_src_flag || udma_err_src_flag;

#else

	return msix_src_flag || hw_err_src_flag;

#endif

}



void hclge_handle_occurred_error(struct hclge_dev *hdev)

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+44 −4
Original line number Diff line number Diff line
@@ -796,7 +796,9 @@ static int hclge_query_function_status(struct hclge_dev *hdev) 


static int hclge_query_pf_resource(struct hclge_dev *hdev)

{

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);

#endif

	struct hclge_pf_res_cmd *req;

	struct hclge_desc desc;

	int ret;
@@ -849,11 +851,13 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev) 
		 */

		hdev->num_msi = hdev->num_nic_msi + hdev->num_roce_msi +

				hdev->num_roh_msi;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	} else if (hnae3_dev_udma_supported(ae_dev)) {

		hdev->num_udma_msi =

			le16_to_cpu(req->pf_intr_vector_number_roce);



		hdev->num_msi = hdev->num_nic_msi + hdev->num_udma_msi;

#endif

	} else {

		hdev->num_msi = hdev->num_nic_msi;

	}
@@ -2982,11 +2986,13 @@ static void hclge_push_link_status(struct hclge_dev *hdev) 
static void hclge_update_link_status(struct hclge_dev *hdev)

{

	struct hnae3_handle *rhandle = &hdev->vport[0].roce;

	struct hnae3_handle *uhandle = &hdev->vport[0].udma;

	struct hnae3_handle *handle = &hdev->vport[0].nic;

	struct hnae3_client *rclient = hdev->roce_client;

	struct hnae3_client *uclient = hdev->udma_client;

	struct hnae3_client *client = hdev->nic_client;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	struct hnae3_handle *uhandle = &hdev->vport[0].udma;

	struct hnae3_client *uclient = hdev->udma_client;

#endif

	int state;

	int ret;
@@ -3008,8 +3014,10 @@ static void hclge_update_link_status(struct hclge_dev *hdev) 
		hclge_config_mac_tnl_int(hdev, state);

		if (rclient && rclient->ops->link_status_change)

			rclient->ops->link_status_change(rhandle, state);

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

		if (uclient && uclient->ops->link_status_change)

			uclient->ops->link_status_change(uhandle, state);

#endif



		hclge_push_link_status(hdev);

	}
@@ -3464,14 +3472,16 @@ static int hclge_set_vf_link_state(struct hnae3_handle *handle, int vf, 


static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)

{

	u32 cmdq_src_reg, msix_src_reg, hw_err_src_reg, udma_err_src_reg;

	u32 cmdq_src_reg, msix_src_reg, hw_err_src_reg;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	u32 udma_err_src_reg = hclge_get_udma_error_reg(hdev);

#endif



	/* fetch the events from their corresponding regs */

	cmdq_src_reg = hclge_read_dev(&hdev->hw, HCLGE_VECTOR0_CMDQ_SRC_REG);

	msix_src_reg = hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS);

	hw_err_src_reg = hclge_read_dev(&hdev->hw,

					HCLGE_RAS_PF_OTHER_INT_STS_REG);

	udma_err_src_reg = hclge_get_udma_error_reg(hdev);



	/* Assumption: If by any chance reset and mailbox events are reported

	 * together then we will only process reset event in this go and will
@@ -3500,10 +3510,16 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 
	}



	/* check for vector0 msix event and hardware error event source */

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK ||

	    hw_err_src_reg & HCLGE_RAS_REG_ERR_MASK ||

	    udma_err_src_reg & HCLGE_RAS_REG_ERR_MASK_UB)

		return HCLGE_VECTOR0_EVENT_ERR;

#else

	if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK ||

	    hw_err_src_reg & HCLGE_RAS_REG_ERR_MASK)

		return HCLGE_VECTOR0_EVENT_ERR;

#endif



	/* check for vector0 ptp event source */

	if (BIT(HCLGE_VECTOR0_REG_PTP_INT_B) & msix_src_reg) {
@@ -3519,10 +3535,16 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 
	}



	/* print other vector0 event source */

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	dev_info(&hdev->pdev->dev,

		 "INT status: CMDQ(%#x) HW errors(%#x, %#x) other(%#x)\n",

		 cmdq_src_reg, hw_err_src_reg, udma_err_src_reg,

		 msix_src_reg);

#else

	dev_info(&hdev->pdev->dev,

		 "INT status: CMDQ(%#x) HW errors(%#x) other(%#x)\n",

		 cmdq_src_reg, hw_err_src_reg, msix_src_reg);

#endif



	return HCLGE_VECTOR0_EVENT_OTHER;

}
@@ -4262,9 +4284,11 @@ static int hclge_reset_prepare(struct hclge_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclge_notify_udma_client(hdev, HNAE3_DOWN_CLIENT);

	if (ret)

		return ret;

#endif



	rtnl_lock();

	ret = hclge_notify_client(hdev, HNAE3_DOWN_CLIENT);
@@ -4290,9 +4314,11 @@ static int hclge_reset_rebuild(struct hclge_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclge_notify_udma_client(hdev, HNAE3_UNINIT_CLIENT);

	if (ret)

		return ret;

#endif



	rtnl_lock();

	ret = hclge_reset_stack(hdev);
@@ -4318,6 +4344,7 @@ static int hclge_reset_rebuild(struct hclge_dev *hdev) 
	    hdev->rst_stats.reset_fail_cnt < HCLGE_RESET_MAX_FAIL_CNT - 1)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclge_notify_udma_client(hdev, HNAE3_INIT_CLIENT);

	/* ignore udma notify error if it fails HCLGE_RESET_MAX_FAIL_CNT - 1

	 * times
@@ -4325,6 +4352,7 @@ static int hclge_reset_rebuild(struct hclge_dev *hdev) 
	if (ret &&

	    hdev->rst_stats.reset_fail_cnt < HCLGE_RESET_MAX_FAIL_CNT - 1)

		return ret;

#endif



	ret = hclge_reset_prepare_up(hdev);

	if (ret)
@@ -4344,9 +4372,11 @@ static int hclge_reset_rebuild(struct hclge_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclge_notify_udma_client(hdev, HNAE3_UP_CLIENT);

	if (ret)

		return ret;

#endif



	hdev->last_reset_time = jiffies;

	hdev->rst_stats.reset_fail_cnt = 0;
@@ -4864,8 +4894,10 @@ struct hclge_vport *hclge_get_vport(struct hnae3_handle *handle) 
		return container_of(handle, struct hclge_vport, roce);

	else if (handle->client->type == HNAE3_CLIENT_ROH)

		return container_of(handle, struct hclge_vport, roh);

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	else if (handle->client->type == HNAE3_CLIENT_UDMA)

		return container_of(handle, struct hclge_vport, udma);

#endif

	else

		return container_of(handle, struct hclge_vport, nic);

}
@@ -11824,9 +11856,11 @@ static int hclge_init_client_instance(struct hnae3_client *client, 
		if (ret)

			goto clear_roce;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

		ret = hclge_init_udma_client_instance(ae_dev, vport);

		if (ret)

			goto clear_udma;

#endif



		break;

	case HNAE3_CLIENT_ROCE:
@@ -11851,6 +11885,7 @@ static int hclge_init_client_instance(struct hnae3_client *client, 
			goto clear_roh;



		break;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	case HNAE3_CLIENT_UDMA:

		if (hnae3_dev_udma_supported(ae_dev)) {

			hdev->udma_client = client;
@@ -11862,6 +11897,7 @@ static int hclge_init_client_instance(struct hnae3_client *client, 
			goto clear_udma;



		break;

#endif

	default:

		return -EINVAL;

	}
@@ -11880,10 +11916,12 @@ static int hclge_init_client_instance(struct hnae3_client *client, 
	hdev->roh_client = NULL;

	vport->roh.client = NULL;

	return ret;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

clear_udma:

	hdev->udma_client = NULL;

	vport->udma.client = NULL;

	return ret;

#endif

}



static void hclge_uninit_client_instance(struct hnae3_client *client,
@@ -11892,6 +11930,7 @@ static void hclge_uninit_client_instance(struct hnae3_client *client, 
	struct hclge_dev *hdev = ae_dev->priv;

	struct hclge_vport *vport = &hdev->vport[0];



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	if (hdev->udma_client && (client->type == HNAE3_CLIENT_UDMA ||

				  client->type == HNAE3_CLIENT_KNIC)) {

		clear_bit(HCLGE_STATE_UDMA_REGISTERED, &hdev->state);
@@ -11904,6 +11943,7 @@ static void hclge_uninit_client_instance(struct hnae3_client *client, 
	}

	if (client->type == HNAE3_CLIENT_UDMA)

		return;

#endif



	if (hdev->roh_client && (client->type == HNAE3_CLIENT_ROH ||

				 client->type == HNAE3_CLIENT_KNIC)) {

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

+24 −0
Original line number Diff line number Diff line
@@ -79,8 +79,10 @@ struct hclgevf_dev *hclgevf_ae_get_hdev(struct hnae3_handle *handle) 
		return container_of(handle, struct hclgevf_dev, nic);

	else if (handle->client->type == HNAE3_CLIENT_ROCE)

		return container_of(handle, struct hclgevf_dev, roce);

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	else if (handle->client->type == HNAE3_CLIENT_UDMA)

		return container_of(handle, struct hclgevf_dev, udma);

#endif

	else

		return container_of(handle, struct hclgevf_dev, nic);

}
@@ -452,7 +454,9 @@ static void hclgevf_request_link_info(struct hclgevf_dev *hdev) 
void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state)

{

	struct hnae3_handle *rhandle = &hdev->roce;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	struct hnae3_handle *uhandle = &hdev->udma;

#endif

	struct hnae3_handle *handle = &hdev->nic;

	struct hnae3_client *rclient;

	struct hnae3_client *uclient;
@@ -472,8 +476,10 @@ void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state) 
		client->ops->link_status_change(handle, !!link_state);

		if (rclient && rclient->ops->link_status_change)

			rclient->ops->link_status_change(rhandle, !!link_state);

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

		if (uclient && uclient->ops->link_status_change)

			uclient->ops->link_status_change(uhandle, !!link_state);

#endif

	}



	clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state);
@@ -1609,9 +1615,11 @@ static int hclgevf_reset_prepare(struct hclgevf_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclgevf_notify_udma_client(hdev, HNAE3_DOWN_CLIENT);

	if (ret)

		return ret;

#endif



	rtnl_lock();

	/* bring down the nic to stop any ongoing TX/RX */
@@ -1632,9 +1640,11 @@ static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclgevf_notify_udma_client(hdev, HNAE3_UNINIT_CLIENT);

	if (ret)

		return ret;

#endif



	rtnl_lock();

	/* now, re-initialize the nic client and ae device */
@@ -1657,6 +1667,7 @@ static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 
	if (ret)

		return ret;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	ret = hclgevf_notify_udma_client(hdev, HNAE3_INIT_CLIENT);

	/* ignore UDMA notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1

	 * times
@@ -1668,6 +1679,7 @@ static int hclgevf_reset_rebuild(struct hclgevf_dev *hdev) 
	ret = hclgevf_notify_udma_client(hdev, HNAE3_UP_CLIENT);

	if (ret)

		return ret;

#endif



	hdev->last_reset_time = jiffies;

	hdev->rst_stats.rst_done_cnt++;
@@ -2565,10 +2577,12 @@ static int hclgevf_init_client_instance(struct hnae3_client *client, 
		if (ret)

			goto clear_roce;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

		ret = hclgevf_init_udma_client_instance(ae_dev,

							hdev->udma_client);

		if (ret)

			goto clear_udma;

#endif



		break;

	case HNAE3_CLIENT_ROCE:
@@ -2582,6 +2596,7 @@ static int hclgevf_init_client_instance(struct hnae3_client *client, 
			goto clear_roce;



		break;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	case HNAE3_CLIENT_UDMA:

		if (hnae3_dev_udma_supported(ae_dev)) {

			hdev->udma_client = client;
@@ -2593,6 +2608,7 @@ static int hclgevf_init_client_instance(struct hnae3_client *client, 
			goto clear_udma;



		break;

#endif

	default:

		return -EINVAL;

	}
@@ -2607,10 +2623,12 @@ static int hclgevf_init_client_instance(struct hnae3_client *client, 
	hdev->roce_client = NULL;

	hdev->roce.client = NULL;

	return ret;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

clear_udma:

	hdev->udma_client = NULL;

	hdev->udma.client = NULL;

	return ret;

#endif

}



static void hclgevf_uninit_client_instance(struct hnae3_client *client,
@@ -2618,6 +2636,7 @@ static void hclgevf_uninit_client_instance(struct hnae3_client *client, 
{

	struct hclgevf_dev *hdev = ae_dev->priv;



#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	/* un-init udma, if it exists and called by nic or udma client */

	if (hdev->udma_client && (client->type == HNAE3_CLIENT_UDMA ||

				  client->type == HNAE3_CLIENT_KNIC)) {
@@ -2631,6 +2650,7 @@ static void hclgevf_uninit_client_instance(struct hnae3_client *client, 
	}

	if (client->type == HNAE3_CLIENT_UDMA)

		return;

#endif



	/* un-init roce, if it exists */

	if (hdev->roce_client) {
@@ -2742,7 +2762,9 @@ static void hclgevf_pci_uninit(struct hclgevf_dev *hdev) 


static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev)

{

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);

#endif

	struct hclgevf_query_res_cmd *req;

	struct hclge_desc desc;

	int ret;
@@ -2774,6 +2796,7 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 
		 */

		hdev->num_msi = hdev->num_roce_msix +

				hdev->roce_base_msix_offset;

#if IS_ENABLED(CONFIG_UB_UDMA_HNS3)

	} else if (hnae3_dev_udma_supported(ae_dev)) {

		hdev->roce_base_msix_offset =

		hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee),
@@ -2791,6 +2814,7 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) 
		 */

		hdev->num_msi = hdev->num_udma_msix +

				hdev->roce_base_msix_offset;

#endif

	} else {

		hdev->num_msi =

		hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number),