Commit 7d76b8a6 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Remove SPSR manipulation primitives 



The SPSR setting code is now completely unused, including that dealing
with banked AArch32 SPSRs. Cleanup time.

Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 41613b51

arch/arm64/include/asm/kvm_emulate.h

+0 −26
Original line number Diff line number Diff line
@@ -34,8 +34,6 @@ enum exception_type { 
};



unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num);

unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu);

void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v);



bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);

void kvm_skip_instr32(struct kvm_vcpu *vcpu);
@@ -180,30 +178,6 @@ static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, 
		vcpu_gp_regs(vcpu)->regs[reg_num] = val;

}



static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)

{

	if (vcpu_mode_is_32bit(vcpu))

		return vcpu_read_spsr32(vcpu);



	if (vcpu->arch.sysregs_loaded_on_cpu)

		return read_sysreg_el1(SYS_SPSR);

	else

		return __vcpu_sys_reg(vcpu, SPSR_EL1);

}



static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)

{

	if (vcpu_mode_is_32bit(vcpu)) {

		vcpu_write_spsr32(vcpu, v);

		return;

	}



	if (vcpu->arch.sysregs_loaded_on_cpu)

		write_sysreg_el1(v, SYS_SPSR);

	else

		__vcpu_sys_reg(vcpu, SPSR_EL1) = v;

}



/*

 * The layout of SPSR for an AArch32 state is different when observed from an

 * AArch64 SPSR_ELx or an AArch32 SPSR_*. This function generates the AArch32

arch/arm64/kvm/regmap.c

+0 −96
Original line number Diff line number Diff line
@@ -126,99 +126,3 @@ unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num) 


	return reg_array + vcpu_reg_offsets[mode][reg_num];

}
 


/*

 * Return the SPSR for the current mode of the virtual CPU.

 */

static int vcpu_spsr32_mode(const struct kvm_vcpu *vcpu)

{

	unsigned long mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK;

	switch (mode) {

	case PSR_AA32_MODE_SVC: return KVM_SPSR_SVC;

	case PSR_AA32_MODE_ABT: return KVM_SPSR_ABT;

	case PSR_AA32_MODE_UND: return KVM_SPSR_UND;

	case PSR_AA32_MODE_IRQ: return KVM_SPSR_IRQ;

	case PSR_AA32_MODE_FIQ: return KVM_SPSR_FIQ;

	default: BUG();

	}

}



unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu)

{

	int spsr_idx = vcpu_spsr32_mode(vcpu);



	if (!vcpu->arch.sysregs_loaded_on_cpu) {

		switch (spsr_idx) {

		case KVM_SPSR_SVC:

			return __vcpu_sys_reg(vcpu, SPSR_EL1);

		case KVM_SPSR_ABT:

			return vcpu->arch.ctxt.spsr_abt;

		case KVM_SPSR_UND:

			return vcpu->arch.ctxt.spsr_und;

		case KVM_SPSR_IRQ:

			return vcpu->arch.ctxt.spsr_irq;

		case KVM_SPSR_FIQ:

			return vcpu->arch.ctxt.spsr_fiq;

		}

	}



	switch (spsr_idx) {

	case KVM_SPSR_SVC:

		return read_sysreg_el1(SYS_SPSR);

	case KVM_SPSR_ABT:

		return read_sysreg(spsr_abt);

	case KVM_SPSR_UND:

		return read_sysreg(spsr_und);

	case KVM_SPSR_IRQ:

		return read_sysreg(spsr_irq);

	case KVM_SPSR_FIQ:

		return read_sysreg(spsr_fiq);

	default:

		BUG();

	}

}



void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v)

{

	int spsr_idx = vcpu_spsr32_mode(vcpu);



	if (!vcpu->arch.sysregs_loaded_on_cpu) {

		switch (spsr_idx) {

		case KVM_SPSR_SVC:

			__vcpu_sys_reg(vcpu, SPSR_EL1) = v;

			break;

		case KVM_SPSR_ABT:

			vcpu->arch.ctxt.spsr_abt = v;

			break;

		case KVM_SPSR_UND:

			vcpu->arch.ctxt.spsr_und = v;

			break;

		case KVM_SPSR_IRQ:

			vcpu->arch.ctxt.spsr_irq = v;

			break;

		case KVM_SPSR_FIQ:

			vcpu->arch.ctxt.spsr_fiq = v;

			break;

		}



		return;

	}



	switch (spsr_idx) {

	case KVM_SPSR_SVC:

		write_sysreg_el1(v, SYS_SPSR);

		break;

	case KVM_SPSR_ABT:

		write_sysreg(v, spsr_abt);

		break;

	case KVM_SPSR_UND:

		write_sysreg(v, spsr_und);

		break;

	case KVM_SPSR_IRQ:

		write_sysreg(v, spsr_irq);

		break;

	case KVM_SPSR_FIQ:

		write_sysreg(v, spsr_fiq);

		break;

	}

}