dt-bindings: thermal: convert rockchip-thermal to json-schema

* Temperature Sensor ADC (TSADC) on rockchip SoCs

Required properties:

- compatible : should be "rockchip,<name>-tsadc"

   "rockchip,px30-tsadc":   found on PX30 SoCs

   "rockchip,rv1108-tsadc": found on RV1108 SoCs

   "rockchip,rk3228-tsadc": found on RK3228 SoCs

   "rockchip,rk3288-tsadc": found on RK3288 SoCs

   "rockchip,rk3328-tsadc": found on RK3328 SoCs

   "rockchip,rk3368-tsadc": found on RK3368 SoCs

   "rockchip,rk3399-tsadc": found on RK3399 SoCs

- reg : physical base address of the controller and length of memory mapped

	region.

- interrupts : The interrupt number to the cpu. The interrupt specifier format

	       depends on the interrupt controller.

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for

		the peripheral clock.

- resets : Must contain an entry for each entry in reset-names.

	   See ../reset/reset.txt for details.

- reset-names : Must include the name "tsadc-apb".

- pinctrl-names : The pin control state names;

- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.

- pinctrl-1 : The "default" pinctrl state, it will be set after reset the

	      TSADC controller.

- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.

- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.

Optional properties:

- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.

- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.

- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW

			       1:HIGH.

- rockchip,grf : The phandle of the syscon node for the general register file.

Exiample:

tsadc: tsadc@ff280000 {

	compatible = "rockchip,rk3288-tsadc";

	reg = <0xff280000 0x100>;

	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

	clock-names = "tsadc", "apb_pclk";

	resets = <&cru SRST_TSADC>;

	reset-names = "tsadc-apb";

	pinctrl-names = "init", "default", "sleep";

	pinctrl-0 = <&otp_gpio>;

	pinctrl-1 = <&otp_out>;

	pinctrl-2 = <&otp_gpio>;

	#thermal-sensor-cells = <1>;

	rockchip,hw-tshut-temp = <95000>;

	rockchip,hw-tshut-mode = <0>;

	rockchip,hw-tshut-polarity = <0>;

};

Example: referring to thermal sensors:

thermal-zones {

	cpu_thermal: cpu_thermal {

		polling-delay-passive = <1000>; /* milliseconds */

		polling-delay = <5000>; /* milliseconds */

		/* sensor	ID */

		thermal-sensors = <&tsadc	1>;

		trips {

			cpu_alert0: cpu_alert {

				temperature = <70000>; /* millicelsius */

				hysteresis = <2000>; /* millicelsius */

				type = "passive";

			};

			cpu_crit: cpu_crit {

				temperature = <90000>; /* millicelsius */

				hysteresis = <2000>; /* millicelsius */

				type = "critical";

			};

		};

		cooling-maps {

			map0 {

				trip = <&cpu_alert0>;

				cooling-device =

				    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

			};

		};

	};

};

# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Temperature Sensor ADC (TSADC) on Rockchip SoCs

maintainers:

  - Heiko Stuebner <heiko@sntech.de>

properties:

  compatible:

    enum:

      - rockchip,px30-tsadc # PX30 SoCs

      - rockchip,rv1108-tsadc # RV1108 SoCs

      - rockchip,rk3228-tsadc # RK3228 SoCs

      - rockchip,rk3288-tsadc # RK3288 SoCs

      - rockchip,rk3328-tsadc # RK3328 SoCs

      - rockchip,rk3368-tsadc # RK3368 SoCs

      - rockchip,rk3399-tsadc # RK3399 SoCs

  reg:

    maxItems: 1

  interrupts:

    maxItems: 1

  clocks:

    minItems: 2

    maxItems: 2

  clock-names:

    items:

      - const: tsadc

      - const: apb_pclk

  resets:

    maxItems: 1

  reset-names:

    items:

      - const: tsadc-apb

  "#thermal-sensor-cells":

    const: 1

  rockchip,grf:

    description: The phandle of the syscon node for the general register file.

    $ref: /schemas/types.yaml#/definitions/phandle

  rockchip,hw-tshut-temp:

    description: The hardware-controlled shutdown temperature value.

    $ref: /schemas/types.yaml#/definitions/uint32

  rockchip,hw-tshut-mode:

    description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [0, 1]

  rockchip,hw-tshut-polarity:

    description: The hardware-controlled active polarity 0:LOW 1:HIGH.

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [0, 1]

required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - resets

  - reset-names

  - "#thermal-sensor-cells"

additionalProperties: false

examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/rk3288-cru.h>

    tsadc: tsadc@ff280000 {

        compatible = "rockchip,rk3288-tsadc";

        reg = <0xff280000 0x100>;

        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

        clock-names = "tsadc", "apb_pclk";

        resets = <&cru SRST_TSADC>;

        reset-names = "tsadc-apb";

        #thermal-sensor-cells = <1>;

        rockchip,hw-tshut-temp = <95000>;

        rockchip,hw-tshut-mode = <0>;

        rockchip,hw-tshut-polarity = <0>;

    };