Commit 7d56a154 authored Mar 10, 2022 by Chiawen Huang Committed by Alex Deucher Mar 25, 2022

drm/amd/display: FEC check in timing validation



[Why]
disable/enable leads FEC mismatch between hw/sw FEC state.

[How]
check FEC status to fastboot on/off.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chiawen Huang <chiawen.huang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 6bf528ec

drivers/gpu/drm/amd/display/dc/core/dc.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -1496,6 +1496,10 @@ bool dc_validate_boot_timing(const struct dc *dc,
		if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))
		return false;

		/* Check for FEC status*/
		if (link->link_enc->funcs->fec_is_active(link->link_enc))
		return false;

		enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

		if (enc_inst == ENGINE_ID_UNKNOWN)