Commit 7d2845d5 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Vinod Koul
Browse files

soundwire: intel: reuse code for wait loops to set/clear bits 



Refactor code and use same routines on set/clear

Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-2-yung-chuan.liao@linux.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 3b71c690

drivers/soundwire/intel.c

+10 −17
Original line number Diff line number Diff line
@@ -123,40 +123,33 @@ static inline void intel_writew(void __iomem *base, int offset, u16 value) 
	writew(value, base + offset);

}



static int intel_clear_bit(void __iomem *base, int offset, u32 value, u32 mask)

static int intel_wait_bit(void __iomem *base, int offset, u32 mask, u32 target)

{

	int timeout = 10;

	u32 reg_read;



	writel(value, base + offset);

	do {

		reg_read = readl(base + offset);

		if (!(reg_read & mask))

		if ((reg_read & mask) == target)

			return 0;



		timeout--;

		udelay(50);

		usleep_range(50, 100);

	} while (timeout != 0);



	return -EAGAIN;

}



static int intel_set_bit(void __iomem *base, int offset, u32 value, u32 mask)

static int intel_clear_bit(void __iomem *base, int offset, u32 value, u32 mask)

{

	int timeout = 10;

	u32 reg_read;



	writel(value, base + offset);

	do {

		reg_read = readl(base + offset);

		if (reg_read & mask)

			return 0;



		timeout--;

		udelay(50);

	} while (timeout != 0);

	return intel_wait_bit(base, offset, mask, 0);

}



	return -EAGAIN;

static int intel_set_bit(void __iomem *base, int offset, u32 value, u32 mask)

{

	writel(value, base + offset);

	return intel_wait_bit(base, offset, mask, mask);

}



/*