Commit 7cd925a8 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Daniel Lezcano
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clocksource/drivers/exynos_mct: Refactor resources allocation



Move interrupts allocation from exynos4_timer_resources() into separate
function together with the interrupt number parsing code from
mct_init_dt(), so the code for managing interrupts is kept together.
While touching exynos4_timer_resources() function, move of_iomap() to it.
No functional changes.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Tested-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211101193531.15078-2-semen.protsenko@linaro.org


Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent ad253b3d
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+30 −20
Original line number Diff line number Diff line
@@ -504,11 +504,14 @@ static int exynos4_mct_dying_cpu(unsigned int cpu)
	return 0;
}

static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base)
static int __init exynos4_timer_resources(struct device_node *np)
{
	int err, cpu;
	struct clk *mct_clk, *tick_clk;

	reg_base = of_iomap(np, 0);
	if (!reg_base)
		panic("%s: unable to ioremap mct address space\n", __func__);

	tick_clk = of_clk_get_by_name(np, "fin_pll");
	if (IS_ERR(tick_clk))
		panic("%s: unable to determine tick clock rate\n", __func__);
@@ -519,9 +522,27 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *
		panic("%s: unable to retrieve mct clock instance\n", __func__);
	clk_prepare_enable(mct_clk);

	reg_base = base;
	if (!reg_base)
		panic("%s: unable to ioremap mct address space\n", __func__);
	return 0;
}

static int __init exynos4_timer_interrupts(struct device_node *np,
					   unsigned int int_type)
{
	int nr_irqs, i, err, cpu;

	mct_int_type = int_type;

	/* This driver uses only one global timer interrupt */
	mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);

	/*
	 * Find out the number of local irqs specified. The local
	 * timer irqs are specified after the four global timer
	 * irqs are specified.
	 */
	nr_irqs = of_irq_count(np);
	for (i = MCT_L0_IRQ; i < nr_irqs; i++)
		mct_irqs[i] = irq_of_parse_and_map(np, i);

	if (mct_int_type == MCT_INT_PPI) {

@@ -581,24 +602,13 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem *

static int __init mct_init_dt(struct device_node *np, unsigned int int_type)
{
	u32 nr_irqs, i;
	int ret;

	mct_int_type = int_type;

	/* This driver uses only one global timer interrupt */
	mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);

	/*
	 * Find out the number of local irqs specified. The local
	 * timer irqs are specified after the four global timer
	 * irqs are specified.
	 */
	nr_irqs = of_irq_count(np);
	for (i = MCT_L0_IRQ; i < nr_irqs; i++)
		mct_irqs[i] = irq_of_parse_and_map(np, i);
	ret = exynos4_timer_resources(np);
	if (ret)
		return ret;

	ret = exynos4_timer_resources(np, of_iomap(np, 0));
	ret = exynos4_timer_interrupts(np, int_type);
	if (ret)
		return ret;