Commit 7c950675 authored by Wenkai Lin's avatar Wenkai Lin Committed by Zhang Zekun
Browse files

iommu/arm-smmu-v3: disable stall for quiet_cd 

maillist inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8PSC6

Reference: https://patchwork.kernel.org/project/kvm/patch/20231206005727.46150-1-zhangfei.gao@linaro.org/



----------------------------------------------

In the stall model, invalid transactions were expected to be
stalled and aborted by the IOPF handler.

However, when killing a test case with a huge amount of data, the
accelerator streamline can not stop until all data is consumed
even if the page fault handler reports errors. As a result, the
kill may take a long time, about 10 seconds with numerous iopf
interrupts.

So disable stall for quiet_cd in the non-force stall model, since
force stall model (STALL_MODEL==0b10) requires CD.S must be 1.

Signed-off-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: default avatarWenkai Lin <linwenkai6@hisilicon.com>
Suggested-by: default avatarJean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Reviewed-by: default avatarJean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20231206005727.46150-1-zhangfei.gao@linaro.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarZhang Zekun <zhangzekun11@huawei.com>
parent 6fc02dd4

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

+3 −0
Original line number Diff line number Diff line
@@ -1070,6 +1070,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, 
	u64 val;

	bool cd_live;

	__le64 *cdptr;

	struct arm_smmu_device *smmu = smmu_domain->smmu;



	if (WARN_ON(ssid >= (1 << smmu_domain->s1_cfg.s1cdmax)))

		return -E2BIG;
@@ -1084,6 +1085,8 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, 
	if (!cd) { /* (5) */

		val = 0;

	} else if (cd == &quiet_cd) { /* (4) */

		if (!(smmu->features & ARM_SMMU_FEAT_STALL_FORCE))

			val &= ~(CTXDESC_CD_0_S | CTXDESC_CD_0_R);

		val |= CTXDESC_CD_0_TCR_EPD0;

	} else if (cd_live) { /* (3) */

		val &= ~CTXDESC_CD_0_ASID;