Commit 7c43ad97 authored by Qi Tao's avatar Qi Tao Committed by JangShui Yang
Browse files

crypto: hisilicon/sec2 - updates the sec DFX function register 

maillist inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I925L9
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev.git/commit/?id=68baa4289b8554998771799ed1f9695721e41a22



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As the sec DFX function is enhanced, some RAS registers are added
to the original DFX registers to enhance the DFX positioning function.

Signed-off-by: default avatarQi Tao <taoqi10@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: default avatarJangShui Yang <yangjiangshui@h-partners.com>
parent 10de05c0

drivers/crypto/hisilicon/sec2/sec_main.c

+5 −0
Original line number Diff line number Diff line
@@ -282,6 +282,11 @@ static const struct debugfs_reg32 sec_dfx_regs[] = { 
	{"SEC_BD_SAA6                   ",  0x301C38},

	{"SEC_BD_SAA7                   ",  0x301C3C},

	{"SEC_BD_SAA8                   ",  0x301C40},

	{"SEC_RAS_CE_ENABLE             ",  0x301050},

	{"SEC_RAS_FE_ENABLE             ",  0x301054},

	{"SEC_RAS_NFE_ENABLE            ",  0x301058},

	{"SEC_REQ_TRNG_TIME_TH          ",  0x30112C},

	{"SEC_CHANNEL_RNG_REQ_THLD      ",  0x302110},

};



/* define the SEC's dfx regs region and region length */