Commit 7bf4a5b0 authored by Vladimir Oltean's avatar Vladimir Oltean Committed by Jakub Kicinski
Browse files

net: mscc: ocelot: optimize ocelot_mm_irq() 



The MAC Merge IRQ of all ports is shared with the PTP TX timestamp IRQ
of all ports, which means that currently, when a PTP TX timestamp is
generated, felix_irq_handler() also polls for the MAC Merge layer status
of all ports, looking for changes. This makes the kernel do more work,
and under certain circumstances may make ptp4l require a
tx_timestamp_timeout argument higher than before.

Changes to the MAC Merge layer status are only to be expected under
certain conditions - its TX direction needs to be enabled - so we can
check early if that is the case, and omit register access otherwise.

Make ocelot_mm_update_port_status() skip register access if
mm->tx_enabled is unset, and also call it once more, outside IRQ
context, from ocelot_port_set_mm(), when mm->tx_enabled transitions from
true to false, because an IRQ is also expected in that case.

Also, a port may have its MAC Merge layer enabled but it may not have
generated the interrupt. In that case, there's no point in writing to
DEV_MM_STATUS to acknowledge that IRQ. We can reduce the number of
register writes per port with MM enabled by keeping an "ack" variable
which writes the "write-one-to-clear" bits. Those are 3 in number:
PRMPT_ACTIVE_STICKY, UNEXP_RX_PFRM_STICKY and UNEXP_TX_PFRM_STICKY.
The other fields in DEV_MM_STATUS are read-only and it doesn't matter
what is written to them, so writing zero is just fine.

Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: default avatarSimon Horman <simon.horman@corigine.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 3ff468ef

drivers/net/ethernet/mscc/ocelot_mm.c

+28 −2
Original line number Diff line number Diff line
@@ -54,7 +54,10 @@ static void ocelot_mm_update_port_status(struct ocelot *ocelot, int port) 
	struct ocelot_port *ocelot_port = ocelot->ports[port];

	struct ocelot_mm_state *mm = &ocelot->mm[port];

	enum ethtool_mm_verify_status verify_status;

	u32 val;

	u32 val, ack = 0;



	if (!mm->tx_enabled)

		return;



	val = ocelot_port_readl(ocelot_port, DEV_MM_STATUS);
@@ -71,21 +74,28 @@ static void ocelot_mm_update_port_status(struct ocelot *ocelot, int port) 


		dev_dbg(ocelot->dev, "Port %d TX preemption %s\n",

			port, mm->tx_active ? "active" : "inactive");



		ack |= DEV_MM_STAT_MM_STATUS_PRMPT_ACTIVE_STICKY;

	}



	if (val & DEV_MM_STAT_MM_STATUS_UNEXP_RX_PFRM_STICKY) {

		dev_err(ocelot->dev,

			"Unexpected P-frame received on port %d while verification was unsuccessful or not yet verified\n",

			port);



		ack |= DEV_MM_STAT_MM_STATUS_UNEXP_RX_PFRM_STICKY;

	}



	if (val & DEV_MM_STAT_MM_STATUS_UNEXP_TX_PFRM_STICKY) {

		dev_err(ocelot->dev,

			"Unexpected P-frame requested to be transmitted on port %d while verification was unsuccessful or not yet verified, or MM_TX_ENA=0\n",

			port);



		ack |= DEV_MM_STAT_MM_STATUS_UNEXP_TX_PFRM_STICKY;

	}



	ocelot_port_writel(ocelot_port, val, DEV_MM_STATUS);

	if (ack)

		ocelot_port_writel(ocelot_port, ack, DEV_MM_STATUS);

}



void ocelot_mm_irq(struct ocelot *ocelot)
@@ -107,11 +117,14 @@ int ocelot_port_set_mm(struct ocelot *ocelot, int port, 
{

	struct ocelot_port *ocelot_port = ocelot->ports[port];

	u32 mm_enable = 0, verify_disable = 0, add_frag_size;

	struct ocelot_mm_state *mm;

	int err;



	if (!ocelot->mm_supported)

		return -EOPNOTSUPP;



	mm = &ocelot->mm[port];



	err = ethtool_mm_frag_size_min_to_add(cfg->tx_min_frag_size,

					      &add_frag_size, extack);

	if (err)
@@ -145,6 +158,19 @@ int ocelot_port_set_mm(struct ocelot *ocelot, int port, 
		       QSYS_PREEMPTION_CFG,

		       port);



	/* The switch will emit an IRQ when TX is disabled, to notify that it

	 * has become inactive. We optimize ocelot_mm_update_port_status() to

	 * not bother processing MM IRQs at all for ports with TX disabled,

	 * but we need to ACK this IRQ now, while mm->tx_enabled is still set,

	 * otherwise we get an IRQ storm.

	 */

	if (mm->tx_enabled && !cfg->tx_enabled) {

		ocelot_mm_update_port_status(ocelot, port);

		WARN_ON(mm->tx_active);

	}



	mm->tx_enabled = cfg->tx_enabled;



	mutex_unlock(&ocelot->fwd_domain_lock);



	return 0;

include/soc/mscc/ocelot.h

+1 −0
Original line number Diff line number Diff line
@@ -745,6 +745,7 @@ struct ocelot_mirror { 


struct ocelot_mm_state {

	enum ethtool_mm_verify_status verify_status;

	bool tx_enabled;

	bool tx_active;

};