Unverified Commit 7b9a516a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-6.0-2' of... 

Merge tag 'imx-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.0, 2nd round:

- A couple of TQMa8MPQL device tree fixes from Alexander Stein on button
  GPIOs and PCF85063 RTC alarm pinctrl.
- Include phy-imx8-pcie.h header in tqma8mqml-mba8mx device tree to fix
  build errors when this SoM dtsi is included on customer carrier boards.
- Remove GPU power domain reset from i.MX8MN device tree to fix
  a sporadical hang seen with GPUMIX powering up.
- Correct CPLD_Dn GPIO label mapping for Toradex Verdin based Menlo
  board.
- Add ARCH_NXP back to defconfig, which was dropped accidentally by
  commit 566e373f ("arm64: Kconfig.platforms: Group NXP platforms
  together").
- Add missing #reset-cells for i.MX8ULP PCC clock controllers.
- Update PMIC voltages for imx8mm-verdin board to fix an issue with one
  Toradex SKU that uses a consumer-grade chip that is capable of going up
  to 1.8GHz at 1.00V.
- A series of imx8mp-venice-gw74xx device tree changes from Tim Harvey
  to fix things on CAN STBY polarity, KSZ9477 CPU uplink port and
  phy-mode.

* tag 'imx-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation
  arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
  arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
  arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
  arm64: defconfig: enable ARCH_NXP
  arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
  arm64: dts: imx8mm-verdin: extend pmic voltages
  arm64: dts: imx8ulp: add #reset-cells for pcc
  arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
  arm64: dts: imx8mn: remove GPU power domain reset
  arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 96c9b511 f7fc391a

arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts

+5 −5
Original line number Diff line number Diff line
@@ -152,11 +152,11 @@ 
	 * CPLD_reset is RESET_SOFT in schematic

	 */

	gpio-line-names =

		"CPLD_D[1]", "CPLD_int", "CPLD_reset", "",

		"", "CPLD_D[0]", "", "",

		"", "", "", "CPLD_D[2]",

		"CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]", "CPLD_D[6]",

		"CPLD_D[7]", "", "", "",

		"CPLD_D[6]", "CPLD_int", "CPLD_reset", "",

		"", "CPLD_D[7]", "", "",

		"", "", "", "CPLD_D[5]",

		"CPLD_D[4]", "CPLD_D[3]", "CPLD_D[2]", "CPLD_D[1]",

		"CPLD_D[0]", "", "", "",

		"", "", "", "",

		"", "", "", "KBD_intK",

		"", "", "", "";

arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts

+0 −1
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ 


/dts-v1/;



#include <dt-bindings/phy/phy-imx8-pcie.h>

#include "imx8mm-tqma8mqml.dtsi"

#include "mba8mx.dtsi"

arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright 2020-2021 TQ-Systems GmbH

 */



#include <dt-bindings/phy/phy-imx8-pcie.h>

#include "imx8mm.dtsi"



/ {

arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -367,8 +367,8 @@ 
				nxp,dvs-standby-voltage = <850000>;

				regulator-always-on;

				regulator-boot-on;

				regulator-max-microvolt = <950000>;

				regulator-min-microvolt = <850000>;

				regulator-max-microvolt = <1050000>;

				regulator-min-microvolt = <805000>;

				regulator-name = "On-module +VDD_ARM (BUCK2)";

				regulator-ramp-delay = <3125>;

			};
@@ -376,8 +376,8 @@ 
			reg_vdd_dram: BUCK3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-max-microvolt = <950000>;

				regulator-min-microvolt = <850000>;

				regulator-max-microvolt = <1000000>;

				regulator-min-microvolt = <805000>;

				regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";

			};
@@ -416,7 +416,7 @@ 
			reg_vdd_snvs: LDO2 {

				regulator-always-on;

				regulator-boot-on;

				regulator-max-microvolt = <900000>;

				regulator-max-microvolt = <800000>;

				regulator-min-microvolt = <800000>;

				regulator-name = "On-module +V0.8_SNVS (LDO2)";

			};

arch/arm64/boot/dts/freescale/imx8mn.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -672,7 +672,6 @@ 
							 <&clk IMX8MN_CLK_GPU_SHADER>,

							 <&clk IMX8MN_CLK_GPU_BUS_ROOT>,

							 <&clk IMX8MN_CLK_GPU_AHB>;

						resets = <&src IMX8MQ_RESET_GPU_RESET>;

					};



					pgc_dispmix: power-domain@3 {