Commit 7afa0033 authored by Qingqing Zhuo's avatar Qingqing Zhuo Committed by Alex Deucher
Browse files

drm/amd/display: Enable pflip interrupt upon pipe enable



[Why]
pflip interrupt would not be enabled promptly if a pipe is disabled
and re-enabled, causing flip_done timeout error during DP
compliance tests

[How]
Enable pflip interrupt upon pipe enablement

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarEryk Brol <eryk.brol@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 680174cf
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+1 −0
Original line number Original line Diff line number Diff line
@@ -4725,6 +4725,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
	dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
	dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
	dc_plane_state->dcc = plane_info.dcc;
	dc_plane_state->dcc = plane_info.dcc;
	dc_plane_state->layer_index = plane_info.layer_index; // Always returns 0
	dc_plane_state->layer_index = plane_info.layer_index; // Always returns 0
	dc_plane_state->flip_int_enabled = true;


	/*
	/*
	 * Always set input transfer function, since plane state is refreshed
	 * Always set input transfer function, since plane state is refreshed
+1 −0
Original line number Original line Diff line number Diff line
@@ -887,6 +887,7 @@ struct dc_plane_state {
	int layer_index;
	int layer_index;


	union surface_update_flags update_flags;
	union surface_update_flags update_flags;
	bool flip_int_enabled;
	/* private to DC core */
	/* private to DC core */
	struct dc_plane_status status;
	struct dc_plane_status status;
	struct dc_context *ctx;
	struct dc_context *ctx;
+11 −0
Original line number Original line Diff line number Diff line
@@ -1257,6 +1257,16 @@ void hubp1_soft_reset(struct hubp *hubp, bool reset)
	REG_UPDATE(DCHUBP_CNTL, HUBP_DISABLE, reset ? 1 : 0);
	REG_UPDATE(DCHUBP_CNTL, HUBP_DISABLE, reset ? 1 : 0);
}
}


void hubp1_set_flip_int(struct hubp *hubp)
{
	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);

	REG_UPDATE(DCSURF_SURFACE_FLIP_INTERRUPT,
		SURFACE_FLIP_INT_MASK, 1);

	return;
}

void hubp1_init(struct hubp *hubp)
void hubp1_init(struct hubp *hubp)
{
{
	//do nothing
	//do nothing
@@ -1290,6 +1300,7 @@ static const struct hubp_funcs dcn10_hubp_funcs = {
	.dmdata_load = NULL,
	.dmdata_load = NULL,
	.hubp_soft_reset = hubp1_soft_reset,
	.hubp_soft_reset = hubp1_soft_reset,
	.hubp_in_blank = hubp1_in_blank,
	.hubp_in_blank = hubp1_in_blank,
	.hubp_set_flip_int = hubp1_set_flip_int,
};
};


/*****************************************/
/*****************************************/
+6 −0
Original line number Original line Diff line number Diff line
@@ -74,6 +74,7 @@
	SRI(DCSURF_SURFACE_EARLIEST_INUSE_C, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_EARLIEST_INUSE_C, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_CONTROL, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_CONTROL, HUBPREQ, id),\
	SRI(DCSURF_SURFACE_FLIP_INTERRUPT, HUBPREQ, id),\
	SRI(HUBPRET_CONTROL, HUBPRET, id),\
	SRI(HUBPRET_CONTROL, HUBPRET, id),\
	SRI(DCN_EXPANSION_MODE, HUBPREQ, id),\
	SRI(DCN_EXPANSION_MODE, HUBPREQ, id),\
	SRI(DCHUBP_REQ_SIZE_CONFIG, HUBP, id),\
	SRI(DCHUBP_REQ_SIZE_CONFIG, HUBP, id),\
@@ -183,6 +184,7 @@
	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_C; \
	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_C; \
	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C; \
	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C; \
	uint32_t DCSURF_SURFACE_CONTROL; \
	uint32_t DCSURF_SURFACE_CONTROL; \
	uint32_t DCSURF_SURFACE_FLIP_INTERRUPT; \
	uint32_t HUBPRET_CONTROL; \
	uint32_t HUBPRET_CONTROL; \
	uint32_t DCN_EXPANSION_MODE; \
	uint32_t DCN_EXPANSION_MODE; \
	uint32_t DCHUBP_REQ_SIZE_CONFIG; \
	uint32_t DCHUBP_REQ_SIZE_CONFIG; \
@@ -332,6 +334,7 @@
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_META_SURFACE_TMZ_C, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_META_SURFACE_TMZ_C, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_EN, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_EN, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_IND_64B_BLK, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_IND_64B_BLK, mask_sh),\
	HUBP_SF(HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT, SURFACE_FLIP_INT_MASK, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, DET_BUF_PLANE1_BASE_ADDRESS, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, DET_BUF_PLANE1_BASE_ADDRESS, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CB_B, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CB_B, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CR_R, mask_sh),\
	HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CR_R, mask_sh),\
@@ -531,6 +534,7 @@
	type PRIMARY_SURFACE_DCC_IND_64B_BLK;\
	type PRIMARY_SURFACE_DCC_IND_64B_BLK;\
	type SECONDARY_SURFACE_DCC_EN;\
	type SECONDARY_SURFACE_DCC_EN;\
	type SECONDARY_SURFACE_DCC_IND_64B_BLK;\
	type SECONDARY_SURFACE_DCC_IND_64B_BLK;\
	type SURFACE_FLIP_INT_MASK;\
	type DET_BUF_PLANE1_BASE_ADDRESS;\
	type DET_BUF_PLANE1_BASE_ADDRESS;\
	type CROSSBAR_SRC_CB_B;\
	type CROSSBAR_SRC_CB_B;\
	type CROSSBAR_SRC_CR_R;\
	type CROSSBAR_SRC_CR_R;\
@@ -777,4 +781,6 @@ void hubp1_read_state_common(struct hubp *hubp);
bool hubp1_in_blank(struct hubp *hubp);
bool hubp1_in_blank(struct hubp *hubp);
void hubp1_soft_reset(struct hubp *hubp, bool reset);
void hubp1_soft_reset(struct hubp *hubp, bool reset);


void hubp1_set_flip_int(struct hubp *hubp);

#endif
#endif
+7 −0
Original line number Original line Diff line number Diff line
@@ -2196,6 +2196,13 @@ static void dcn10_enable_plane(
	if (dc->debug.sanity_checks) {
	if (dc->debug.sanity_checks) {
		hws->funcs.verify_allow_pstate_change_high(dc);
		hws->funcs.verify_allow_pstate_change_high(dc);
	}
	}

	if (!pipe_ctx->top_pipe
		&& pipe_ctx->plane_state
		&& pipe_ctx->plane_state->flip_int_enabled
		&& pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int)
			pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int(pipe_ctx->plane_res.hubp);

}
}


void dcn10_program_gamut_remap(struct pipe_ctx *pipe_ctx)
void dcn10_program_gamut_remap(struct pipe_ctx *pipe_ctx)
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