Commit 7ae24e05 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Viresh Kumar
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dt-bindings: cpufreq: cpufreq-qcom-hw: Sanitize data per compatible 



Introduce per-SoC compatibles for OSM targets (read: pre-sm8250) and
sanitize the number of interrupt{s,-names} and reg/-names per-compatible.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 287143d8

Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

+89 −1
Original line number Diff line number Diff line
@@ -20,6 +20,12 @@ properties: 
    oneOf:

      - description: v1 of CPUFREQ HW

        items:

          - enum:

              - qcom,sc7180-cpufreq-hw

              - qcom,sdm845-cpufreq-hw

              - qcom,sm6115-cpufreq-hw

              - qcom,sm6350-cpufreq-hw

              - qcom,sm8150-cpufreq-hw

          - const: qcom,cpufreq-hw



      - description: v2 of CPUFREQ HW (EPSS)
@@ -86,6 +92,88 @@ required: 


additionalProperties: false



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,qdu1000-cpufreq-epss

              - qcom,sc7180-cpufreq-hw

              - qcom,sc8280xp-cpufreq-epss

              - qcom,sdm845-cpufreq-hw

              - qcom,sm6115-cpufreq-hw

              - qcom,sm6350-cpufreq-hw

              - qcom,sm6375-cpufreq-epss

    then:

      properties:

        reg:

          minItems: 2

          maxItems: 2



        reg-names:

          minItems: 2

          maxItems: 2



        interrupts:

          minItems: 2

          maxItems: 2



        interrupt-names:

          minItems: 2



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc7280-cpufreq-epss

              - qcom,sm8250-cpufreq-epss

              - qcom,sm8350-cpufreq-epss

              - qcom,sm8450-cpufreq-epss

              - qcom,sm8550-cpufreq-epss

    then:

      properties:

        reg:

          minItems: 3

          maxItems: 3



        reg-names:

          minItems: 3

          maxItems: 3



        interrupts:

          minItems: 3

          maxItems: 3



        interrupt-names:

          minItems: 3



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sm8150-cpufreq-hw

    then:

      properties:

        reg:

          minItems: 3

          maxItems: 3



        reg-names:

          minItems: 3

          maxItems: 3



        # On some SoCs the Prime core shares the LMH irq with Big cores

        interrupts:

          minItems: 2

          maxItems: 2



        interrupt-names:

          minItems: 2





examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
@@ -236,7 +324,7 @@ examples: 
      #size-cells = <1>;



      cpufreq@17d43000 {

        compatible = "qcom,cpufreq-hw";

        compatible = "qcom,sdm845-cpufreq-hw", "qcom,cpufreq-hw";

        reg = <0x17d43000 0x1400>, <0x17d45800 0x1400>;

        reg-names = "freq-domain0", "freq-domain1";