Commit 7addff40 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Vinod Koul
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phy: qcom-snps: Add sc8280xp support 



The Qualcomm sc8280xp platform comes with a 5nm femto USB PHY which, in
contrast to previously seen platforms, has the SIDDQ bit in the COMMON0
register default to high.

So make the driver match on the 5nm compatible and make sure to clear
the SIDDQ bit on phy_init.

Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225034049.2294207-2-bjorn.andersson@linaro.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 641024df

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

+5 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#define POR					BIT(1)



#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0	(0x54)

#define SIDDQ					BIT(2)

#define RETENABLEN				BIT(3)

#define FSEL_MASK				GENMASK(6, 4)

#define FSEL_DEFAULT				(0x3 << 4)
@@ -233,6 +234,9 @@ static int qcom_snps_hsphy_init(struct phy *phy) 
	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL0,

					SLEEPM, SLEEPM);



	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0,

				   SIDDQ, 0);



	qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL5,

					POR, 0);
@@ -275,6 +279,7 @@ static const struct phy_ops qcom_snps_hsphy_gen_ops = { 


static const struct of_device_id qcom_snps_hsphy_of_match_table[] = {

	{ .compatible	= "qcom,sm8150-usb-hs-phy", },

	{ .compatible	= "qcom,usb-snps-hs-5nm-phy", },

	{ .compatible	= "qcom,usb-snps-hs-7nm-phy", },

	{ .compatible	= "qcom,usb-snps-femto-v2-phy",	},

	{ }