Commit 7acbbc7c authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by John Harrison
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drm/i915/guc: put all guc objects in lmem when available 



The firmware binary has to be loaded from lmem and the recommendation is
to put all other objects in there as well. Note that we don't fall back
to system memory if the allocation in lmem fails because all objects are
allocated during driver load and if we have issues with lmem at that point
something is seriously wrong with the system, so no point in trying to
handle it.

Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210916162819.27848-3-matthew.brost@intel.com
parent ea97e44f

drivers/gpu/drm/i915/gem/i915_gem_lmem.c

+26 −0
Original line number Diff line number Diff line
@@ -103,6 +103,32 @@ __i915_gem_object_create_lmem_with_ps(struct drm_i915_private *i915, 
					     size, page_size, flags);

}



struct drm_i915_gem_object *

i915_gem_object_create_lmem_from_data(struct drm_i915_private *i915,

				      const void *data, size_t size)

{

	struct drm_i915_gem_object *obj;

	void *map;



	obj = i915_gem_object_create_lmem(i915,

					  round_up(size, PAGE_SIZE),

					  I915_BO_ALLOC_CONTIGUOUS);

	if (IS_ERR(obj))

		return obj;



	map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);

	if (IS_ERR(map)) {

		i915_gem_object_put(obj);

		return map;

	}



	memcpy(map, data, size);



	i915_gem_object_unpin_map(obj);



	return obj;

}



struct drm_i915_gem_object *

i915_gem_object_create_lmem(struct drm_i915_private *i915,

			    resource_size_t size,

drivers/gpu/drm/i915/gem/i915_gem_lmem.h

+4 −0
Original line number Diff line number Diff line
@@ -23,6 +23,10 @@ bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj); 


bool __i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);



struct drm_i915_gem_object *

i915_gem_object_create_lmem_from_data(struct drm_i915_private *i915,

				      const void *data, size_t size);



struct drm_i915_gem_object *

__i915_gem_object_create_lmem_with_ps(struct drm_i915_private *i915,

				      resource_size_t size,

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+8 −1
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright © 2014-2019 Intel Corporation

 */



#include "gem/i915_gem_lmem.h"

#include "gt/intel_gt.h"

#include "gt/intel_gt_irq.h"

#include "gt/intel_gt_pm_irq.h"
@@ -647,7 +648,13 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size) 
	u64 flags;

	int ret;



	if (HAS_LMEM(gt->i915))

		obj = i915_gem_object_create_lmem(gt->i915, size,

						  I915_BO_ALLOC_CPU_CLEAR |

						  I915_BO_ALLOC_CONTIGUOUS);

	else

		obj = i915_gem_object_create_shmem(gt->i915, size);



	if (IS_ERR(obj))

		return ERR_CAST(obj);

drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c

+9 −4
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ static void guc_prepare_xfer(struct intel_uncore *uncore) 
}



/* Copy RSA signature from the fw image to HW for verification */

static void guc_xfer_rsa(struct intel_uc_fw *guc_fw,

static int guc_xfer_rsa(struct intel_uc_fw *guc_fw,

			struct intel_uncore *uncore)

{

	u32 rsa[UOS_RSA_SCRATCH_COUNT];
@@ -49,10 +49,13 @@ static void guc_xfer_rsa(struct intel_uc_fw *guc_fw, 
	int i;



	copied = intel_uc_fw_copy_rsa(guc_fw, rsa, sizeof(rsa));

	GEM_BUG_ON(copied < sizeof(rsa));

	if (copied < sizeof(rsa))

		return -ENOMEM;



	for (i = 0; i < UOS_RSA_SCRATCH_COUNT; i++)

		intel_uncore_write(uncore, UOS_RSA_SCRATCH(i), rsa[i]);



	return 0;

}



/*
@@ -141,7 +144,9 @@ int intel_guc_fw_upload(struct intel_guc *guc) 
	 * by the DMA engine in one operation, whereas the RSA signature is

	 * loaded via MMIO.

	 */

	guc_xfer_rsa(&guc->fw, uncore);

	ret = guc_xfer_rsa(&guc->fw, uncore);

	if (ret)

		goto out;



	/*

	 * Current uCode expects the code to be loaded at 8k; locations below

drivers/gpu/drm/i915/gt/uc/intel_huc.c

+11 −3
Original line number Diff line number Diff line
@@ -87,17 +87,25 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc) 
									vma->obj, true));

	if (IS_ERR(vaddr)) {

		i915_vma_unpin_and_release(&vma, 0);

		return PTR_ERR(vaddr);

		err = PTR_ERR(vaddr);

		goto unpin_out;

	}



	copied = intel_uc_fw_copy_rsa(&huc->fw, vaddr, vma->size);

	GEM_BUG_ON(copied < huc->fw.rsa_size);



	i915_gem_object_unpin_map(vma->obj);



	if (copied < huc->fw.rsa_size) {

		err = -ENOMEM;

		goto unpin_out;

	}



	huc->rsa_data = vma;



	return 0;



unpin_out:

	i915_vma_unpin_and_release(&vma, 0);

	return err;

}



static void intel_huc_rsa_data_destroy(struct intel_huc *huc)