Commit 7a6ee0bb authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Greg Kroah-Hartman
Browse files

mips: dts: ralink: add MT7621 SoC 



The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU,
a 5-port 10/100/1000 switch/PHY and one RGMII.

Add the devicetrees for GB-PC1 and GB-PC2 devices which use MT7621 SoC.

Acked-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Acked-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Link: https://lore.kernel.org/r/20220315160149.3617-1-arinc.unal@arinc9.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5aaec657

MAINTAINERS

+7 −0
Original line number Diff line number Diff line
@@ -16180,6 +16180,13 @@ L: linux-mips@vger.kernel.org 
S:	Maintained

F:	arch/mips/ralink









RALINK MT7621 MIPS ARCHITECTURE









M:	Arınç ÜNAL <arinc.unal@arinc9.com>









M:	Sergio Paracuellos <sergio.paracuellos@gmail.com>









L:	linux-mips@vger.kernel.org









S:	Maintained









F:	arch/mips/boot/dts/ralink/mt7621*

















RALINK RT2X00 WIRELESS LAN DRIVER









M:	Stanislaw Gruszka <stf_xl@wp.pl>









M:	Helmut Schaa <helmut.schaa@googlemail.com>
































arch/mips/boot/dts/ralink/Makefile



+4
−0






























Original line number
Diff line number
Diff line







@@ -6,4 +6,8 @@ dtb-$(CONFIG_DTB_MT7620A_EVAL)	+= mt7620a_eval.dtb







dtb-$(CONFIG_DTB_OMEGA2P)	+= omega2p.dtb









dtb-$(CONFIG_DTB_VOCORE2)	+= vocore2.dtb



















dtb-$(CONFIG_SOC_MT7621) += \









	mt7621-gnubee-gb-pc1.dtb \









	mt7621-gnubee-gb-pc2.dtb



















obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))