Commit 7a062ce3 authored by Yee Lee's avatar Yee Lee Committed by Catalin Marinas
Browse files

arm64/cpufeature: Optionally disable MTE via command-line 



MTE support needs to be optionally disabled in runtime
for HW issue workaround, FW development and some
evaluation works on system resource and performance.

This patch makes two changes:
(1) moves init of tag-allocation bits(ATA/ATA0) to
cpu_enable_mte() as not cached in TLB.

(2) allows ID_AA64PFR1_EL1.MTE to be overridden on
its shadow value by giving "arm64.nomte" on cmdline.

When the feature value is off, ATA and TCF will not set
and the related functionalities are accordingly suppressed.

Suggested-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Suggested-by: default avatarMarc Zyngier <maz@kernel.org>
Suggested-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarYee Lee <yee.lee@mediatek.com>
Link: https://lore.kernel.org/r/20210803070824.7586-2-yee.lee@mediatek.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 76721503

Documentation/admin-guide/kernel-parameters.txt

+3 −0
Original line number Diff line number Diff line
@@ -380,6 +380,9 @@ 
	arm64.nopauth	[ARM64] Unconditionally disable Pointer Authentication

			support



	arm64.nomte	[ARM64] Unconditionally disable Memory Tagging Extension

			support



	ataflop=	[HW,M68k]



	atarimouse=	[HW,MOUSE] Atari Mouse

arch/arm64/include/asm/sysreg.h

+1 −2
Original line number Diff line number Diff line
@@ -699,8 +699,7 @@ 
	(SCTLR_ELx_M    | SCTLR_ELx_C    | SCTLR_ELx_SA   | SCTLR_EL1_SA0   | \

	 SCTLR_EL1_SED  | SCTLR_ELx_I    | SCTLR_EL1_DZE  | SCTLR_EL1_UCT   | \

	 SCTLR_EL1_NTWE | SCTLR_ELx_IESB | SCTLR_EL1_SPAN | SCTLR_ELx_ITFSB | \

	 SCTLR_ELx_ATA  | SCTLR_EL1_ATA0 | ENDIAN_SET_EL1 | SCTLR_EL1_UCI   | \

	 SCTLR_EL1_EPAN | SCTLR_EL1_RES1)

	 ENDIAN_SET_EL1 | SCTLR_EL1_UCI  | SCTLR_EL1_EPAN | SCTLR_EL1_RES1)



/* MAIR_ELx memory attributes (used by Linux) */

#define MAIR_ATTR_DEVICE_nGnRnE		UL(0x00)

arch/arm64/kernel/cpufeature.c

+3 −0
Original line number Diff line number Diff line
@@ -1843,6 +1843,9 @@ static void bti_enable(const struct arm64_cpu_capabilities *__unused) 
#ifdef CONFIG_ARM64_MTE

static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap)

{

	sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_ATA | SCTLR_EL1_ATA0);

	isb();



	/*

	 * Clear the tags in the zero page. This needs to be done via the

	 * linear map which has the Tagged attribute.

arch/arm64/kernel/idreg-override.c

+2 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ static const struct ftr_set_desc pfr1 __initconst = { 
	.override	= &id_aa64pfr1_override,

	.fields		= {

	        { "bt", ID_AA64PFR1_BT_SHIFT },

		{ "mte", ID_AA64PFR1_MTE_SHIFT},

		{}

	},

};
@@ -100,6 +101,7 @@ static const struct { 
	{ "arm64.nopauth",

	  "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "

	  "id_aa64isar1.api=0 id_aa64isar1.apa=0"	   },

	{ "arm64.nomte",		"id_aa64pfr1.mte=0" },

	{ "nokaslr",			"kaslr.disabled=1" },

};