Commit 794fe85d authored by Will Deacon's avatar Will Deacon
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ARM: mm: remove broken condition check for v4 flushing 



There's no point having a conditional cache flush if we don't know the
state of the condition beforehand.

This patch makes the cacheflush in v4_flush_user_cache_range
unconditional.

signed-off-by: default avatarwill deacon <will.deacon@arm.com>
parent 3ef52f2a

arch/arm/mm/cache-v4.S

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all) 
ENTRY(v4_flush_user_cache_range)

#ifdef CONFIG_CPU_CP15

	mov	ip, #0

	mcreq	p15, 0, ip, c7, c7, 0		@ flush ID cache

	mcr	p15, 0, ip, c7, c7, 0		@ flush ID cache

	mov	pc, lr

#else

	/* FALLTHROUGH */