Commit 794abc08 authored by Naveen N. Rao's avatar Naveen N. Rao Committed by Michael Ellerman
Browse files

powerpc64/bpf: Get rid of PPC_BPF_[LL|STL|STLU] macros 



All these macros now have a single user. Expand their usage in place.

Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e0526fc7633a34f983a7a330712b55bdfaf20482.1644834730.git.naveen.n.rao@linux.vnet.ibm.com
parent 391c271f

arch/powerpc/net/bpf_jit64.h

+0 −22
Original line number Diff line number Diff line
@@ -64,28 +64,6 @@ const int b2p[MAX_BPF_JIT_REG + 2] = { 
/* PPC NVR range -- update this if we ever use NVRs below r27 */

#define BPF_PPC_NVR_MIN		27



/*

 * WARNING: These can use TMP_REG_2 if the offset is not at word boundary,

 * so ensure that it isn't in use already.

 */

#define PPC_BPF_LL(r, base, i) do {					      \

				if ((i) % 4) {				      \

					EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\

					EMIT(PPC_RAW_LDX(r, base,	      \

							b2p[TMP_REG_2]));     \

				} else					      \

					EMIT(PPC_RAW_LD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STL(r, base, i) do {					      \

				if ((i) % 4) {				      \

					EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\

					EMIT(PPC_RAW_STDX(r, base,	      \

							b2p[TMP_REG_2]));     \

				} else					      \

					EMIT(PPC_RAW_STD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STLU(r, base, i) do { EMIT(PPC_RAW_STDU(r, base, i)); } while(0)



#endif /* !__ASSEMBLY__ */



#endif

arch/powerpc/net/bpf_jit_comp64.c

+15 −6
Original line number Diff line number Diff line
@@ -100,7 +100,7 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx) 
			EMIT(PPC_RAW_STD(0, 1, PPC_LR_STKOFF));

		}



		PPC_BPF_STLU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size));

		EMIT(PPC_RAW_STDU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size)));

	}



	/*
@@ -726,7 +726,12 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * 
				PPC_LI32(b2p[TMP_REG_1], imm);

				src_reg = b2p[TMP_REG_1];

			}

			PPC_BPF_STL(src_reg, dst_reg, off);

			if (off % 4) {

				EMIT(PPC_RAW_LI(b2p[TMP_REG_2], off));

				EMIT(PPC_RAW_STDX(src_reg, dst_reg, b2p[TMP_REG_2]));

			} else {

				EMIT(PPC_RAW_STD(src_reg, dst_reg, off));

			}

			break;



		/*
@@ -802,9 +807,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * 
				PPC_BCC_SHORT(COND_GT, (ctx->idx + 3) * 4);

				EMIT(PPC_RAW_LI(dst_reg, 0));

				/*

				 * Check if 'off' is word aligned because PPC_BPF_LL()

				 * (BPF_DW case) generates two instructions if 'off' is not

				 * word-aligned and one instruction otherwise.

				 * Check if 'off' is word aligned for BPF_DW, because

				 * we might generate two instructions.

				 */

				if (BPF_SIZE(code) == BPF_DW && (off & 3))

					PPC_JMP((ctx->idx + 3) * 4);
@@ -823,7 +827,12 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * 
				EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));

				break;

			case BPF_DW:

				PPC_BPF_LL(dst_reg, src_reg, off);

				if (off % 4) {

					EMIT(PPC_RAW_LI(b2p[TMP_REG_1], off));

					EMIT(PPC_RAW_LDX(dst_reg, src_reg, b2p[TMP_REG_1]));

				} else {

					EMIT(PPC_RAW_LD(dst_reg, src_reg, off));

				}

				break;

			}