Commit 792ca7e3 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-fixes-2021-07-27' of https://gitlab.freedesktop.org/drm/msm into drm-fixes 



A few fixes for v5.14, including a fix for a crash if display triggers
an iommu fault (which tends to happen at probe time on devices with
bootloader fw that leaves display enabled as kernel starts)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGubeV_uzWhsqp_+EmQmPcPatnqWOQnARoing2YvQOHbyg@mail.gmail.com
parents ff117646 fc71c9e6

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+1 −1
Original line number Diff line number Diff line
@@ -296,7 +296,7 @@ static const struct dpu_mdp_cfg sc7180_mdp[] = { 
static const struct dpu_mdp_cfg sm8250_mdp[] = {

	{

	.name = "top_0", .id = MDP_TOP,

	.base = 0x0, .len = 0x45C,

	.base = 0x0, .len = 0x494,

	.features = 0,

	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */

	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {

drivers/gpu/drm/msm/dp/dp_catalog.c

+1 −0
Original line number Diff line number Diff line
@@ -771,6 +771,7 @@ int dp_catalog_panel_timing_cfg(struct dp_catalog *dp_catalog) 
	dp_write_link(catalog, REG_DP_HSYNC_VSYNC_WIDTH_POLARITY,

				dp_catalog->width_blanking);

	dp_write_link(catalog, REG_DP_ACTIVE_HOR_VER, dp_catalog->dp_active);

	dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, 0);

	return 0;

}

drivers/gpu/drm/msm/dp/dp_ctrl.c

+1 −1
Original line number Diff line number Diff line
@@ -1526,7 +1526,7 @@ static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) 
	 * running. Add the global reset just before disabling the

	 * link clocks and core clocks.

	 */

	ret = dp_ctrl_off(&ctrl->dp_ctrl);

	ret = dp_ctrl_off_link_stream(&ctrl->dp_ctrl);

	if (ret) {

		DRM_ERROR("failed to disable DP controller\n");

		return ret;

drivers/gpu/drm/msm/dp/dp_display.c

+5 −0
Original line number Diff line number Diff line
@@ -219,6 +219,7 @@ static int dp_display_bind(struct device *dev, struct device *master, 
		goto end;

	}



	dp->aux->drm_dev = drm;

	rc = dp_aux_register(dp->aux);

	if (rc) {

		DRM_ERROR("DRM DP AUX register failed\n");
@@ -1311,6 +1312,10 @@ static int dp_pm_resume(struct device *dev) 
	else

		dp->dp_display.is_connected = false;



	dp_display_handle_plugged_change(g_dp_display,

				dp->dp_display.is_connected);





	mutex_unlock(&dp->event_mutex);



	return 0;

drivers/gpu/drm/msm/msm_iommu.c

+10 −1
Original line number Diff line number Diff line
@@ -142,6 +142,9 @@ static const struct iommu_flush_ops null_tlb_ops = { 
	.tlb_add_page = msm_iommu_tlb_add_page,

};



static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,

		unsigned long iova, int flags, void *arg);



struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent)

{

	struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(parent->dev);
@@ -157,6 +160,13 @@ struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent) 
	if (!ttbr1_cfg)

		return ERR_PTR(-ENODEV);



	/*

	 * Defer setting the fault handler until we have a valid adreno_smmu

	 * to avoid accidentially installing a GPU specific fault handler for

	 * the display's iommu

	 */

	iommu_set_fault_handler(iommu->domain, msm_fault_handler, iommu);



	pagetable = kzalloc(sizeof(*pagetable), GFP_KERNEL);

	if (!pagetable)

		return ERR_PTR(-ENOMEM);
@@ -300,7 +310,6 @@ struct msm_mmu *msm_iommu_new(struct device *dev, struct iommu_domain *domain) 


	iommu->domain = domain;

	msm_mmu_init(&iommu->base, dev, &funcs, MSM_MMU_IOMMU);

	iommu_set_fault_handler(domain, msm_fault_handler, iommu);



	atomic_set(&iommu->pagetables, 0);