Loading arch/arm/boot/dts/imx53.dtsi +12 −1 Original line number Diff line number Diff line Loading @@ -46,10 +46,21 @@ cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; clocks = <&clks IMX5_CLK_ARM>; clock-latency = <61036>; voltage-tolerance = <5>; operating-points = < /* kHz */ 166666 850000 400000 900000 800000 1050000 1000000 1200000 1200000 1300000 >; }; }; Loading Loading
arch/arm/boot/dts/imx53.dtsi +12 −1 Original line number Diff line number Diff line Loading @@ -46,10 +46,21 @@ cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; clocks = <&clks IMX5_CLK_ARM>; clock-latency = <61036>; voltage-tolerance = <5>; operating-points = < /* kHz */ 166666 850000 400000 900000 800000 1050000 1000000 1200000 1200000 1300000 >; }; }; Loading