Commit 7910898e authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Paolo Abeni
Browse files

net: mtk_eth_soc: move trgmii ddr2 check to probe function 



If TRGMII mode is not permitted when using DDR2 mode, we should handle
that when setting up phylink's ->supported_interfaces so phylink knows
that this is not supported by the hardware. Move this check to
mtk_add_mac().

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 04eb3d1c

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+10 −11
Original line number Diff line number Diff line
@@ -374,17 +374,6 @@ static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth, 
{

	u32 val;



	/* Check DDR memory type.

	 * Currently TRGMII mode with DDR2 memory is not supported.

	 */

	regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val);

	if (interface == PHY_INTERFACE_MODE_TRGMII &&

	    val & SYSCFG_DRAM_TYPE_DDR2) {

		dev_err(eth->dev,

			"TRGMII mode with DDR2 memory is not supported!\n");

		return -EOPNOTSUPP;

	}



	val = (interface == PHY_INTERFACE_MODE_TRGMII) ?

		ETHSYS_TRGMII_MT7621_DDR_PLL : 0;
@@ -4333,6 +4322,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) 
	struct mtk_mac *mac;

	int id, err;

	int txqs = 1;

	u32 val;



	if (!_id) {

		dev_err(eth->dev, "missing mac id\n");
@@ -4409,6 +4399,15 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) 
		__set_bit(PHY_INTERFACE_MODE_TRGMII,

			  mac->phylink_config.supported_interfaces);



	/* TRGMII is not permitted on MT7621 if using DDR2 */

	if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) &&

	    MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII_MT7621_CLK)) {

		regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val);

		if (val & SYSCFG_DRAM_TYPE_DDR2)

			__clear_bit(PHY_INTERFACE_MODE_TRGMII,

				    mac->phylink_config.supported_interfaces);

	}



	if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) {

		__set_bit(PHY_INTERFACE_MODE_SGMII,

			  mac->phylink_config.supported_interfaces);