Merge branch 'jsgf/x86/unify' of... (790c7ebb) · Commits · EulixOS / Software / Kernel

arch/x86/include/asm/io.h

+90 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@

		#include <linux/compiler.h>
		#include <asm-generic/int-ll64.h>
		#include <asm/page.h>

		#define build_mmio_read(name, size, type, reg, barrier) \
		static inline type name(const volatile void __iomem *addr) \
		@@ -80,6 +81,95 @@ static inline void writeq(__u64 val, volatile void __iomem *addr)
		#define readq readq
		#define writeq writeq

		/**
		* virt_to_phys - map virtual addresses to physical
		* @address: address to remap
		*
		* The returned physical address is the physical (CPU) mapping for
		* the memory address given. It is only valid to use this function on
		* addresses directly mapped or allocated via kmalloc.
		*
		* This function does not give bus mappings for DMA transfers. In
		* almost all conceivable cases a device driver should not be using
		* this function
		*/

		static inline phys_addr_t virt_to_phys(volatile void *address)
		{
		return __pa(address);
		}

		/**
		* phys_to_virt - map physical address to virtual
		* @address: address to remap
		*
		* The returned virtual address is a current CPU mapping for
		* the memory address given. It is only valid to use this function on
		* addresses that have a kernel mapping
		*
		* This function does not handle bus mappings for DMA transfers. In
		* almost all conceivable cases a device driver should not be using
		* this function
		*/

		static inline void *phys_to_virt(phys_addr_t address)
		{
		return __va(address);
		}

		/*
		* Change "struct page" to physical address.
		*/
		#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

		/*
		* ISA I/O bus memory addresses are 1:1 with the physical address.
		*/
		#define isa_virt_to_bus virt_to_phys
		#define isa_page_to_bus page_to_phys
		#define isa_bus_to_virt phys_to_virt

		/*
		* However PCI ones are not necessarily 1:1 and therefore these interfaces
		* are forbidden in portable PCI drivers.
		*
		* Allow them on x86 for legacy drivers, though.
		*/
		#define virt_to_bus virt_to_phys
		#define bus_to_virt phys_to_virt

		/**
		* ioremap - map bus memory into CPU space
		* @offset: bus address of the memory
		* @size: size of the resource to map
		*
		* ioremap performs a platform specific sequence of operations to
		* make bus memory CPU accessible via the readb/readw/readl/writeb/
		* writew/writel functions and the other mmio helpers. The returned
		* address is not guaranteed to be usable directly as a virtual
		* address.
		*
		* If the area you are trying to map is a PCI BAR you should have a
		* look at pci_iomap().
		*/
		extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
		unsigned long prot_val);

		/*
		* The default ioremap() behavior is non-cached:
		*/
		static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
		{
		return ioremap_nocache(offset, size);
		}

		extern void iounmap(volatile void __iomem *addr);

		extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);


		#ifdef CONFIG_X86_32
		# include "io_32.h"
		#else

arch/x86/include/asm/io_32.h

+0 −86

Original line number	Diff line number	Diff line
		@@ -53,92 +53,6 @@
		*/
		#define xlate_dev_kmem_ptr(p) p

		/**
		* virt_to_phys - map virtual addresses to physical
		* @address: address to remap
		*
		* The returned physical address is the physical (CPU) mapping for
		* the memory address given. It is only valid to use this function on
		* addresses directly mapped or allocated via kmalloc.
		*
		* This function does not give bus mappings for DMA transfers. In
		* almost all conceivable cases a device driver should not be using
		* this function
		*/

		static inline unsigned long virt_to_phys(volatile void *address)
		{
		return __pa(address);
		}

		/**
		* phys_to_virt - map physical address to virtual
		* @address: address to remap
		*
		* The returned virtual address is a current CPU mapping for
		* the memory address given. It is only valid to use this function on
		* addresses that have a kernel mapping
		*
		* This function does not handle bus mappings for DMA transfers. In
		* almost all conceivable cases a device driver should not be using
		* this function
		*/

		static inline void *phys_to_virt(unsigned long address)
		{
		return __va(address);
		}

		/*
		* Change "struct page" to physical address.
		*/
		#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

		/**
		* ioremap - map bus memory into CPU space
		* @offset: bus address of the memory
		* @size: size of the resource to map
		*
		* ioremap performs a platform specific sequence of operations to
		* make bus memory CPU accessible via the readb/readw/readl/writeb/
		* writew/writel functions and the other mmio helpers. The returned
		* address is not guaranteed to be usable directly as a virtual
		* address.
		*
		* If the area you are trying to map is a PCI BAR you should have a
		* look at pci_iomap().
		*/
		extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
		unsigned long prot_val);

		/*
		* The default ioremap() behavior is non-cached:
		*/
		static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
		{
		return ioremap_nocache(offset, size);
		}

		extern void iounmap(volatile void __iomem *addr);

		/*
		* ISA I/O bus memory addresses are 1:1 with the physical address.
		*/
		#define isa_virt_to_bus virt_to_phys
		#define isa_page_to_bus page_to_phys
		#define isa_bus_to_virt phys_to_virt

		/*
		* However PCI ones are not necessarily 1:1 and therefore these interfaces
		* are forbidden in portable PCI drivers.
		*
		* Allow them on x86 for legacy drivers, though.
		*/
		#define virt_to_bus virt_to_phys
		#define bus_to_virt phys_to_virt

		static inline void
		memset_io(volatile void __iomem *addr, unsigned char val, int count)
		{

arch/x86/include/asm/io_64.h

+0 −59

Original line number	Diff line number	Diff line
		@@ -142,67 +142,8 @@ __OUTS(l)

		#include <linux/vmalloc.h>

		#ifndef __i386__
		/*
		* Change virtual addresses to physical addresses and vv.
		* These are pretty trivial
		*/
		static inline unsigned long virt_to_phys(volatile void *address)
		{
		return __pa(address);
		}

		static inline void *phys_to_virt(unsigned long address)
		{
		return __va(address);
		}
		#endif

		/*
		* Change "struct page" to physical address.
		*/
		#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

		#include <asm-generic/iomap.h>

		/*
		* This one maps high address device memory and turns off caching for that area.
		* it's useful if some control registers are in such an area and write combining
		* or read caching is not desirable:
		*/
		extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
		extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
		unsigned long prot_val);

		/*
		* The default ioremap() behavior is non-cached:
		*/
		static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
		{
		return ioremap_nocache(offset, size);
		}

		extern void iounmap(volatile void __iomem *addr);

		extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);

		/*
		* ISA I/O bus memory addresses are 1:1 with the physical address.
		*/
		#define isa_virt_to_bus virt_to_phys
		#define isa_page_to_bus page_to_phys
		#define isa_bus_to_virt phys_to_virt

		/*
		* However PCI ones are not necessarily 1:1 and therefore these interfaces
		* are forbidden in portable PCI drivers.
		*
		* Allow them on x86 for legacy drivers, though.
		*/
		#define virt_to_bus virt_to_phys
		#define bus_to_virt phys_to_virt

		void __memcpy_fromio(void *, unsigned long, unsigned);
		void __memcpy_toio(unsigned long, const void *, unsigned);

arch/x86/include/asm/page.h

+15 −0

Original line number	Diff line number	Diff line
		@@ -95,6 +95,11 @@ static inline pgdval_t native_pgd_val(pgd_t pgd)
		return pgd.pgd;
		}

		static inline pgdval_t pgd_flags(pgd_t pgd)
		{
		return native_pgd_val(pgd) & PTE_FLAGS_MASK;
		}

		#if PAGETABLE_LEVELS >= 3
		#if PAGETABLE_LEVELS == 4
		typedef struct { pudval_t pud; } pud_t;
		@@ -117,6 +122,11 @@ static inline pudval_t native_pud_val(pud_t pud)
		}
		#endif /* PAGETABLE_LEVELS == 4 */

		static inline pudval_t pud_flags(pud_t pud)
		{
		return native_pud_val(pud) & PTE_FLAGS_MASK;
		}

		typedef struct { pmdval_t pmd; } pmd_t;

		static inline pmd_t native_make_pmd(pmdval_t val)
		@@ -128,6 +138,11 @@ static inline pmdval_t native_pmd_val(pmd_t pmd)
		{
		return pmd.pmd;
		}

		static inline pmdval_t pmd_flags(pmd_t pmd)
		{
		return native_pmd_val(pmd) & PTE_FLAGS_MASK;
		}
		#else /* PAGETABLE_LEVELS == 2 */
		#include <asm-generic/pgtable-nopmd.h>

arch/x86/include/asm/pgtable-2level.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
		#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
		#endif

		#define pte_none(x) (!(x).pte_low)

		/*
		* Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
		* split up the 29 bits of offset into this range: