Commit 7907e69f authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'renesas-clk-for-v5.12-tag2' of... 

Merge tag 'renesas-clk-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add I2c and Ethernet (RAVB) clocks on R-Car V3U
 - Fix a kerneldoc issue
 - Add timer (TMU) clocks on most R-Car Gen3 SoCs
 - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
   (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
   (SYS-DMAC) clocks on R-Car V3U
 - Add support for the USB 2.0 clock selector on RZ/G2 SoCs
 - Minor fixes and improvements

* tag 'renesas-clk-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (21 commits)
  clk: renesas: cpg-mssr: Fix formatting issues for 'smstpcr_saved's documentation
  clk: renesas: r8a779a0: Add RAVB clocks
  clk: renesas: r8a779a0: Add I2C clocks
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add support for RZ/G2 M/N/H
  clk: renesas: r8a779a0: Add SYS-DMAC clocks
  clk: renesas: r8a779a0: Add SDHI support
  clk: renesas: rcar-gen3: Factor out CPG library
  clk: renesas: rcar-gen3: Remove cpg_quirks access when registering SD clock
  clk: renesas: r8a779a0: Add MSIOF clocks
  clk: renesas: r8a779a0: Add PFC/GPIO clocks
  clk: renesas: r8a779a0: Fix parent of CBFUSA clock
  clk: renesas: r8a779a0: Remove non-existent S2 clock
  clk: renesas: r8a779a0: Add HSCIF support
  clk: renesas: r8a779a0: Add RWDT clocks
  clk: renesas: r8a779a0: Add VSPX clock support
  clk: renesas: r8a779a0: Add VSPD clock support
  clk: renesas: r8a779a0: Add FCPVD clock support
  clk: renesas: r8a77995: Add TMU clocks
  clk: renesas: r8a77990: Add TMU clocks
  clk: renesas: r8a77965: Add TMU clocks
  ...
parents 5c8fe583 24ece965

Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml

+3 −0
Original line number Diff line number Diff line
@@ -35,6 +35,9 @@ properties: 
  compatible:

    items:

      - enum:

          - renesas,r8a774a1-rcar-usb2-clock-sel # RZ/G2M

          - renesas,r8a774b1-rcar-usb2-clock-sel # RZ/G2N

          - renesas,r8a774e1-rcar-usb2-clock-sel # RZ/G2H

          - renesas,r8a7795-rcar-usb2-clock-sel  # R-Car H3

          - renesas,r8a7796-rcar-usb2-clock-sel  # R-Car M3-W

          - renesas,r8a77961-rcar-usb2-clock-sel # R-Car M3-W+

drivers/clk/renesas/Kconfig

+5 −0
Original line number Diff line number Diff line
@@ -148,6 +148,7 @@ config CLK_R8A77995 


config CLK_R8A779A0

	bool "R-Car V3U clock support" if COMPILE_TEST

	select CLK_RCAR_CPG_LIB

	select CLK_RENESAS_CPG_MSSR



config CLK_R9A06G032
@@ -162,12 +163,16 @@ config CLK_SH73A0 




# Family

config CLK_RCAR_CPG_LIB

	bool "CPG/MSSR library functions" if COMPILE_TEST



config CLK_RCAR_GEN2_CPG

	bool "R-Car Gen2 CPG clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSSR



config CLK_RCAR_GEN3_CPG

	bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST

	select CLK_RCAR_CPG_LIB

	select CLK_RENESAS_CPG_MSSR



config CLK_RCAR_USB2_CLOCK_SEL

drivers/clk/renesas/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o 
obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o



# Family

obj-$(CONFIG_CLK_RCAR_CPG_LIB)		+= rcar-cpg-lib.o

obj-$(CONFIG_CLK_RCAR_GEN2_CPG)		+= rcar-gen2-cpg.o

obj-$(CONFIG_CLK_RCAR_GEN3_CPG)		+= rcar-gen3-cpg.o

obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL)	+= rcar-usb2-clock-sel.o

drivers/clk/renesas/r8a7796-cpg-mssr.c

+5 −0
Original line number Diff line number Diff line
@@ -128,6 +128,11 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { 


static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {

	DEF_MOD("fdp1-0",		 119,	R8A7796_CLK_S0D1),

	DEF_MOD("tmu4",			 121,	R8A7796_CLK_S0D6),

	DEF_MOD("tmu3",			 122,	R8A7796_CLK_S3D2),

	DEF_MOD("tmu2",			 123,	R8A7796_CLK_S3D2),

	DEF_MOD("tmu1",			 124,	R8A7796_CLK_S3D2),

	DEF_MOD("tmu0",			 125,	R8A7796_CLK_CP),

	DEF_MOD("scif5",		 202,	R8A7796_CLK_S3D4),

	DEF_MOD("scif4",		 203,	R8A7796_CLK_S3D4),

	DEF_MOD("scif3",		 204,	R8A7796_CLK_S3D4),

drivers/clk/renesas/r8a77965-cpg-mssr.c

+5 −0
Original line number Diff line number Diff line
@@ -123,6 +123,11 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = { 


static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {

	DEF_MOD("fdp1-0",		119,	R8A77965_CLK_S0D1),

	DEF_MOD("tmu4",			121,	R8A77965_CLK_S0D6),

	DEF_MOD("tmu3",			122,	R8A77965_CLK_S3D2),

	DEF_MOD("tmu2",			123,	R8A77965_CLK_S3D2),

	DEF_MOD("tmu1",			124,	R8A77965_CLK_S3D2),

	DEF_MOD("tmu0",			125,	R8A77965_CLK_CP),

	DEF_MOD("scif5",		202,	R8A77965_CLK_S3D4),

	DEF_MOD("scif4",		203,	R8A77965_CLK_S3D4),

	DEF_MOD("scif3",		204,	R8A77965_CLK_S3D4),