Unverified Commit 78c94808 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v6.0-rockchip-dtsfixes1' of...

Merge tag 'v6.0-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Drop some not-specified properties, fix phy-supply properties,
fix edp clock on Gru, fix usb port on BPI-R2-Pro, fix license typo,
fix wlan-wake-pin on Gru-Bob and lower the sd-card speed on Quartz64-B

* tag 'v6.0-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Remove 'enable-active-low' from rk3566-quartz64-a
  arm64: dts: rockchip: Remove 'enable-active-low' from rk3399-puma
  arm64: dts: rockchip: fix property for usb2 phy supply on rk3568-evb1-v10
  arm64: dts: rockchip: fix property for usb2 phy supply on rock-3a
  arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
  arm64: dts: rockchip: fix upper usb port on BPI-R2-Pro
  arm64: dts: rockchip: Fix typo in lisense text for PX30.Core
  arm64: dts: rockchip: Pull up wlan wake# on Gru-Bob
  arm64: dts: rockchip: Lower sd speed on quartz64-b

Link: https://lore.kernel.org/r/2645885.mvXUDI8C0e@phil


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 02181e68 ea89926d
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+2 −2
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@@ -2,8 +2,8 @@
/*
 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
 * Copyright (c) 2020 Engicam srl
 * Copyright (c) 2020 Amarula Solutons
 * Copyright (c) 2020 Amarula Solutons(India)
 * Copyright (c) 2020 Amarula Solutions
 * Copyright (c) 2020 Amarula Solutions(India)
 */

#include <dt-bindings/gpio/gpio.h>
+5 −0
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@@ -88,3 +88,8 @@
		};
	};
};

&wlan_host_wake_l {
	/* Kevin has an external pull up, but Bob does not. */
	rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
+9 −0
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@@ -244,6 +244,14 @@
&edp {
	status = "okay";

	/*
	 * eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only
	 * set this here, because rk3399-gru.dtsi ensures we can generate this
	 * off GPLL=600MHz, whereas some other RK3399 boards may not.
	 */
	assigned-clocks = <&cru PCLK_EDP>;
	assigned-clock-rates = <24000000>;

	ports {
		edp_out: port@1 {
			reg = <1>;
@@ -578,6 +586,7 @@ ap_i2c_tp: &i2c5 {
	};

	wlan_host_wake_l: wlan-host-wake-l {
		/* Kevin has an external pull up, but Bob does not */
		rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
	};
};
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@@ -62,7 +62,6 @@
	vcc5v0_host: vcc5v0-host-regulator {
		compatible = "regulator-fixed";
		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
		enable-active-low;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc5v0_host_en>;
		regulator-name = "vcc5v0_host";
+0 −1
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@@ -189,7 +189,6 @@

	vcc3v3_sd: vcc3v3_sd {
		compatible = "regulator-fixed";
		enable-active-low;
		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc_sd_h>;
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