Unverified Commit 78bb52b9 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!12041 [sync] PR-12032: serial: sc16is7xx: fix invalid FIFO access with special register set 

Merge Pull Request from: @openeuler-sync-bot 
 

Origin pull request: 
https://gitee.com/openeuler/kernel/pulls/12032 
 
PR sync from: Gu Bowen <gubowen5@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/55JRZ6VKD5H66VQ73IFESATDJTQBWFG7/ 
 
https://gitee.com/src-openeuler/kernel/issues/IAOY1A 
 
Link:https://gitee.com/openeuler/kernel/pulls/12041

 

Reviewed-by: default avatarYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parents faeaa790 dc459041

drivers/tty/serial/sc16is7xx.c

+4 −0
Original line number Diff line number Diff line
@@ -537,6 +537,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud) 
			      SC16IS7XX_MCR_CLKSEL_BIT,

			      prescaler);



	mutex_lock(&s->efr_lock);



	/* Open the LCR divisors for configuration */

	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,

			     SC16IS7XX_LCR_CONF_MODE_A);
@@ -550,6 +552,8 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud) 
	/* Put LCR back to the normal mode */

	sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);



	mutex_unlock(&s->efr_lock);



	return DIV_ROUND_CLOSEST(clk / 16, div);

}