Commit 78aa2190 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Joerg Roedel
Browse files

ARM: dts: r8a7742: Add IPMMU DT nodes 



Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarChris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200825141805.27105-3-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent d88f7e02

arch/arm/boot/dts/r8a7742.dtsi

+48 −0
Original line number Diff line number Diff line
@@ -386,6 +386,54 @@ 
			#thermal-sensor-cells = <0>;

		};



		ipmmu_sy0: iommu@e6280000 {

			compatible = "renesas,ipmmu-r8a7742",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6280000 0 0x1000>;

			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;

			status = "disabled";

		};



		ipmmu_sy1: iommu@e6290000 {

			compatible = "renesas,ipmmu-r8a7742",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6290000 0 0x1000>;

			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;

			status = "disabled";

		};



		ipmmu_ds: iommu@e6740000 {

			compatible = "renesas,ipmmu-r8a7742",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6740000 0 0x1000>;

			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;

			status = "disabled";

		};



		ipmmu_mp: iommu@ec680000 {

			compatible = "renesas,ipmmu-r8a7742",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xec680000 0 0x1000>;

			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;

			status = "disabled";

		};



		ipmmu_mx: iommu@fe951000 {

			compatible = "renesas,ipmmu-r8a7742",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xfe951000 0 0x1000>;

			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;

			status = "disabled";

		};



		icram0: sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;