dt-bindings: can: xilinx_can: Convert Xilinx CAN binding to YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/can/xilinx,can.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title:

  Xilinx Axi CAN/Zynq CANPS controller

maintainers:

  - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>

properties:

  compatible:

    enum:

      - xlnx,zynq-can-1.0

      - xlnx,axi-can-1.00.a

      - xlnx,canfd-1.0

      - xlnx,canfd-2.0

  reg:

    maxItems: 1

  interrupts:

    maxItems: 1

  clocks:

    minItems: 1

    maxItems: 2

  clock-names:

    maxItems: 2

  power-domains:

    maxItems: 1

  tx-fifo-depth:

    $ref: "/schemas/types.yaml#/definitions/uint32"

    description: CAN Tx fifo depth (Zynq, Axi CAN).

  rx-fifo-depth:

    $ref: "/schemas/types.yaml#/definitions/uint32"

    description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode)

  tx-mailbox-count:

    $ref: "/schemas/types.yaml#/definitions/uint32"

    description: CAN Tx mailbox buffer count (CAN FD)

required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

unevaluatedProperties: false

allOf:

  - $ref: can-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - xlnx,zynq-can-1.0

    then:

      properties:

        clock-names:

          items:

            - const: can_clk

            - const: pclk

      required:

        - tx-fifo-depth

        - rx-fifo-depth

  - if:

      properties:

        compatible:

          contains:

            enum:

              - xlnx,axi-can-1.00.a

    then:

      properties:

        clock-names:

          items:

            - const: can_clk

            - const: s_axi_aclk

      required:

        - tx-fifo-depth

        - rx-fifo-depth

  - if:

      properties:

        compatible:

          contains:

            enum:

              - xlnx,canfd-1.0

              - xlnx,canfd-2.0

    then:

      properties:

        clock-names:

          items:

            - const: can_clk

            - const: s_axi_aclk

      required:

        - tx-mailbox-count

        - rx-fifo-depth

examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    can@e0008000 {

        compatible = "xlnx,zynq-can-1.0";

        reg = <0xe0008000 0x1000>;

        clocks = <&clkc 19>, <&clkc 36>;

        clock-names = "can_clk", "pclk";

        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-parent = <&intc>;

        tx-fifo-depth = <0x40>;

        rx-fifo-depth = <0x40>;

    };

  - |

    can@40000000 {

        compatible = "xlnx,axi-can-1.00.a";

        reg = <0x40000000 0x10000>;

        clocks = <&clkc 0>, <&clkc 1>;

        clock-names = "can_clk", "s_axi_aclk";

        interrupt-parent = <&intc>;

        interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;

        tx-fifo-depth = <0x40>;

        rx-fifo-depth = <0x40>;

    };

  - |

    can@40000000 {

        compatible = "xlnx,canfd-1.0";

        reg = <0x40000000 0x2000>;

        clocks = <&clkc 0>, <&clkc 1>;

        clock-names = "can_clk", "s_axi_aclk";

        interrupt-parent = <&intc>;

        interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;

        tx-mailbox-count = <0x20>;

        rx-fifo-depth = <0x20>;

    };

  - |

    can@ff060000 {

        compatible = "xlnx,canfd-2.0";

        reg = <0xff060000 0x6000>;

        clocks = <&clkc 0>, <&clkc 1>;

        clock-names = "can_clk", "s_axi_aclk";

        interrupt-parent = <&intc>;

        interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;

        tx-mailbox-count = <0x20>;

        rx-fifo-depth = <0x40>;

    };

Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings

---------------------------------------------------------

Required properties:

- compatible		: Should be:

			  - "xlnx,zynq-can-1.0" for Zynq CAN controllers

			  - "xlnx,axi-can-1.00.a" for Axi CAN controllers

			  - "xlnx,canfd-1.0" for CAN FD controllers

			  - "xlnx,canfd-2.0" for CAN FD 2.0 controllers

- reg			: Physical base address and size of the controller

			  registers map.

- interrupts		: Property with a value describing the interrupt

			  number.

- clock-names		: List of input clock names

			  - "can_clk", "pclk" (For CANPS),

			  - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD).

			  (See clock bindings for details).

- clocks		: Clock phandles (see clock bindings for details).

- tx-fifo-depth		: Can Tx fifo depth (Zynq, Axi CAN).

- rx-fifo-depth		: Can Rx fifo depth (Zynq, Axi CAN, CAN FD in

                          sequential Rx mode).

- tx-mailbox-count	: Can Tx mailbox buffer count (CAN FD).

- rx-mailbox-count	: Can Rx mailbox buffer count (CAN FD in mailbox Rx

			  mode).

Example:

For Zynq CANPS Dts file:

	zynq_can_0: can@e0008000 {

			compatible = "xlnx,zynq-can-1.0";

			clocks = <&clkc 19>, <&clkc 36>;

			clock-names = "can_clk", "pclk";

			reg = <0xe0008000 0x1000>;

			interrupts = <0 28 4>;

			interrupt-parent = <&intc>;

			tx-fifo-depth = <0x40>;

			rx-fifo-depth = <0x40>;

		};

For Axi CAN Dts file:

	axi_can_0: axi-can@40000000 {

			compatible = "xlnx,axi-can-1.00.a";

			clocks = <&clkc 0>, <&clkc 1>;

			clock-names = "can_clk","s_axi_aclk" ;

			reg = <0x40000000 0x10000>;

			interrupt-parent = <&intc>;

			interrupts = <0 59 1>;

			tx-fifo-depth = <0x40>;

			rx-fifo-depth = <0x40>;

		};

For CAN FD Dts file:

	canfd_0: canfd@40000000 {

			compatible = "xlnx,canfd-1.0";

			clocks = <&clkc 0>, <&clkc 1>;

			clock-names = "can_clk", "s_axi_aclk";

			reg = <0x40000000 0x2000>;

			interrupt-parent = <&intc>;

			interrupts = <0 59 1>;

			tx-mailbox-count = <0x20>;

			rx-fifo-depth = <0x20>;

		};