Commit 77e5253d authored by Joakim Zhang's avatar Joakim Zhang Committed by David S. Miller
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arm64: dts: imx8mp: change interrupt order per dt-binding 



This patch changs interrupt order which found by dtbs_check.

$ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml: ethernet@30bf0000: interrupt-names:0: 'macirq' was expected
arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml: ethernet@30bf0000: interrupt-names:1: 'eth_wake_irq' was expected

According to Documentation/devicetree/bindings/net/snps,dwmac.yaml, we
should list interrupt in it's order.

Signed-off-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e314a07e

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -821,9 +821,9 @@ 
			eqos: ethernet@30bf0000 {

				compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";

				reg = <0x30bf0000 0x10000>;

				interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "eth_wake_irq", "macirq";

				interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "macirq", "eth_wake_irq";

				clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,

					 <&clk IMX8MP_CLK_QOS_ENET_ROOT>,

					 <&clk IMX8MP_CLK_ENET_QOS_TIMER>,