Loading sound/soc/codecs/es8328.c +29 −6 Original line number Diff line number Diff line Loading @@ -60,7 +60,11 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { #define ES8328_RATES (SNDRV_PCM_RATE_44100 | \ SNDRV_PCM_RATE_22050 | \ SNDRV_PCM_RATE_11025) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ SNDRV_PCM_FMTBIT_S18_3LE | \ SNDRV_PCM_FMTBIT_S20_3LE | \ SNDRV_PCM_FMTBIT_S24_LE | \ SNDRV_PCM_FMTBIT_S32_LE) struct es8328_priv { struct regmap *regmap; Loading Loading @@ -449,6 +453,7 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, int i; int reg; int val; int wl; u8 ratio; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) Loading @@ -470,10 +475,28 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X); return -EINVAL; } ret = snd_soc_update_bits(codec, ES8328_MASTERMODE, snd_soc_update_bits(codec, ES8328_MASTERMODE, ES8328_MASTERMODE_MCLKDIV2, val); if (ret < 0) return ret; switch (params_width(params)) { case 16: wl = 3; break; case 18: wl = 2; break; case 20: wl = 1; break; case 24: wl = 0; break; case 32: wl = 4; break; default: return -EINVAL; } /* find master mode MCLK to sampling frequency ratio */ ratio = mclk_ratios[0].rate; Loading @@ -484,14 +507,14 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { snd_soc_update_bits(codec, ES8328_DACCONTROL1, ES8328_DACCONTROL1_DACWL_MASK, ES8328_DACCONTROL1_DACWL_16); wl << ES8328_DACCONTROL1_DACWL_SHIFT); es8328->playback_fs = params_rate(params); es8328_set_deemph(codec); } else snd_soc_update_bits(codec, ES8328_ADCCONTROL4, ES8328_ADCCONTROL4_ADCWL_MASK, ES8328_ADCCONTROL4_ADCWL_16); wl << ES8328_ADCCONTROL4_ADCWL_SHIFT); return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio); } Loading sound/soc/codecs/es8328.h +2 −10 Original line number Diff line number Diff line Loading @@ -91,11 +91,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) #define ES8328_ADCCONTROL4_ADCWL_24 (0 << 2) #define ES8328_ADCCONTROL4_ADCWL_20 (1 << 2) #define ES8328_ADCCONTROL4_ADCWL_18 (2 << 2) #define ES8328_ADCCONTROL4_ADCWL_16 (3 << 2) #define ES8328_ADCCONTROL4_ADCWL_32 (4 << 2) #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2 #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) Loading Loading @@ -131,11 +127,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) #define ES8328_DACCONTROL1_DACWL_24 (0 << 3) #define ES8328_DACCONTROL1_DACWL_20 (1 << 3) #define ES8328_DACCONTROL1_DACWL_18 (2 << 3) #define ES8328_DACCONTROL1_DACWL_16 (3 << 3) #define ES8328_DACCONTROL1_DACWL_32 (4 << 3) #define ES8328_DACCONTROL1_DACWL_SHIFT 3 #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) Loading Loading
sound/soc/codecs/es8328.c +29 −6 Original line number Diff line number Diff line Loading @@ -60,7 +60,11 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { #define ES8328_RATES (SNDRV_PCM_RATE_44100 | \ SNDRV_PCM_RATE_22050 | \ SNDRV_PCM_RATE_11025) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ SNDRV_PCM_FMTBIT_S18_3LE | \ SNDRV_PCM_FMTBIT_S20_3LE | \ SNDRV_PCM_FMTBIT_S24_LE | \ SNDRV_PCM_FMTBIT_S32_LE) struct es8328_priv { struct regmap *regmap; Loading Loading @@ -449,6 +453,7 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, int i; int reg; int val; int wl; u8 ratio; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) Loading @@ -470,10 +475,28 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X); return -EINVAL; } ret = snd_soc_update_bits(codec, ES8328_MASTERMODE, snd_soc_update_bits(codec, ES8328_MASTERMODE, ES8328_MASTERMODE_MCLKDIV2, val); if (ret < 0) return ret; switch (params_width(params)) { case 16: wl = 3; break; case 18: wl = 2; break; case 20: wl = 1; break; case 24: wl = 0; break; case 32: wl = 4; break; default: return -EINVAL; } /* find master mode MCLK to sampling frequency ratio */ ratio = mclk_ratios[0].rate; Loading @@ -484,14 +507,14 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { snd_soc_update_bits(codec, ES8328_DACCONTROL1, ES8328_DACCONTROL1_DACWL_MASK, ES8328_DACCONTROL1_DACWL_16); wl << ES8328_DACCONTROL1_DACWL_SHIFT); es8328->playback_fs = params_rate(params); es8328_set_deemph(codec); } else snd_soc_update_bits(codec, ES8328_ADCCONTROL4, ES8328_ADCCONTROL4_ADCWL_MASK, ES8328_ADCCONTROL4_ADCWL_16); wl << ES8328_ADCCONTROL4_ADCWL_SHIFT); return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio); } Loading
sound/soc/codecs/es8328.h +2 −10 Original line number Diff line number Diff line Loading @@ -91,11 +91,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) #define ES8328_ADCCONTROL4_ADCWL_24 (0 << 2) #define ES8328_ADCCONTROL4_ADCWL_20 (1 << 2) #define ES8328_ADCCONTROL4_ADCWL_18 (2 << 2) #define ES8328_ADCCONTROL4_ADCWL_16 (3 << 2) #define ES8328_ADCCONTROL4_ADCWL_32 (4 << 2) #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2 #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) Loading Loading @@ -131,11 +127,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap); #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) #define ES8328_DACCONTROL1_DACWL_24 (0 << 3) #define ES8328_DACCONTROL1_DACWL_20 (1 << 3) #define ES8328_DACCONTROL1_DACWL_18 (2 << 3) #define ES8328_DACCONTROL1_DACWL_16 (3 << 3) #define ES8328_DACCONTROL1_DACWL_32 (4 << 3) #define ES8328_DACCONTROL1_DACWL_SHIFT 3 #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) Loading