Loading arch/avr32/mach-at32ap/extint.c +23 −22 Original line number Diff line number Diff line Loading @@ -61,35 +61,36 @@ struct eic { static struct eic *nmi_eic; static bool nmi_enabled; static void eic_ack_irq(unsigned int irq) static void eic_ack_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); } static void eic_mask_irq(unsigned int irq) static void eic_mask_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); } static void eic_mask_ack_irq(unsigned int irq) static void eic_mask_ack_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); } static void eic_unmask_irq(unsigned int irq) static void eic_unmask_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, IER, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, IER, 1 << (d->irq - eic->first_irq)); } static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type) { struct eic *eic = get_irq_chip_data(irq); struct eic *eic = irq_data_get_irq_chip_data(data); struct irq_desc *desc; unsigned int irq = d->irq; unsigned int i = irq - eic->first_irq; u32 mode, edge, level; int ret = 0; Loading @@ -98,7 +99,7 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) if (flow_type == IRQ_TYPE_NONE) flow_type = IRQ_TYPE_LEVEL_LOW; desc = &irq_desc[irq]; desc = irq_to_desc(irq); mode = eic_readl(eic, MODE); edge = eic_readl(eic, EDGE); Loading Loading @@ -145,16 +146,16 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) static struct irq_chip eic_chip = { .name = "eic", .ack = eic_ack_irq, .mask = eic_mask_irq, .mask_ack = eic_mask_ack_irq, .unmask = eic_unmask_irq, .set_type = eic_set_irq_type, .irq_ack = eic_ack_irq, .irq_mask = eic_mask_irq, .irq_mask_ack = eic_mask_ack_irq, .irq_unmask = eic_unmask_irq, .irq_set_type = eic_set_irq_type, }; static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) { struct eic *eic = desc->handler_data; struct eic *eic = get_irq_desc_data(desc); unsigned long status, pending; unsigned int i; Loading Loading
arch/avr32/mach-at32ap/extint.c +23 −22 Original line number Diff line number Diff line Loading @@ -61,35 +61,36 @@ struct eic { static struct eic *nmi_eic; static bool nmi_enabled; static void eic_ack_irq(unsigned int irq) static void eic_ack_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); } static void eic_mask_irq(unsigned int irq) static void eic_mask_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); } static void eic_mask_ack_irq(unsigned int irq) static void eic_mask_ack_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, ICR, 1 << (irq - eic->first_irq)); eic_writel(eic, IDR, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); } static void eic_unmask_irq(unsigned int irq) static void eic_unmask_irq(struct irq_chip *d) { struct eic *eic = get_irq_chip_data(irq); eic_writel(eic, IER, 1 << (irq - eic->first_irq)); struct eic *eic = irq_data_get_irq_chip_data(data); eic_writel(eic, IER, 1 << (d->irq - eic->first_irq)); } static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type) { struct eic *eic = get_irq_chip_data(irq); struct eic *eic = irq_data_get_irq_chip_data(data); struct irq_desc *desc; unsigned int irq = d->irq; unsigned int i = irq - eic->first_irq; u32 mode, edge, level; int ret = 0; Loading @@ -98,7 +99,7 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) if (flow_type == IRQ_TYPE_NONE) flow_type = IRQ_TYPE_LEVEL_LOW; desc = &irq_desc[irq]; desc = irq_to_desc(irq); mode = eic_readl(eic, MODE); edge = eic_readl(eic, EDGE); Loading Loading @@ -145,16 +146,16 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) static struct irq_chip eic_chip = { .name = "eic", .ack = eic_ack_irq, .mask = eic_mask_irq, .mask_ack = eic_mask_ack_irq, .unmask = eic_unmask_irq, .set_type = eic_set_irq_type, .irq_ack = eic_ack_irq, .irq_mask = eic_mask_irq, .irq_mask_ack = eic_mask_ack_irq, .irq_unmask = eic_unmask_irq, .irq_set_type = eic_set_irq_type, }; static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) { struct eic *eic = desc->handler_data; struct eic *eic = get_irq_desc_data(desc); unsigned long status, pending; unsigned int i; Loading