Commit 77657b80 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'amlogic-drivers-2.1' of... 

Merge tag 'amlogic-drivers-2.1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into v5.4/dt64-2

soc: amlogic: updates for v5.4 (round 2)
- add power domain controller
parents e9a12e14 bd9eccf1

Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml

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+93 −0
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

# Copyright 2019 BayLibre, SAS

%YAML 1.2

---

$id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Amlogic Meson Everything-Else Power Domains



maintainers:

  - Neil Armstrong <narmstrong@baylibre.com>



description: |+

  The Everything-Else Power Domains node should be the child of a syscon

  node with the required property:



  - compatible: Should be the following:

                "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"



  Refer to the the bindings described in

  Documentation/devicetree/bindings/mfd/syscon.txt



properties:

  compatible:

    enum:

      - amlogic,meson-g12a-pwrc

      - amlogic,meson-sm1-pwrc



  clocks:

    minItems: 2



  clock-names:

    items:

      - const: vpu

      - const: vapb



  resets:

    minItems: 11



  reset-names:

    items:

      - const: viu

      - const: venc

      - const: vcbus

      - const: bt656

      - const: rdma

      - const: venci

      - const: vencp

      - const: vdac

      - const: vdi6

      - const: vencl

      - const: vid_lock



  "#power-domain-cells":

    const: 1



  amlogic,ao-sysctrl:

    description: phandle to the AO sysctrl node

    allOf:

      - $ref: /schemas/types.yaml#/definitions/phandle



required:

  - compatible

  - clocks

  - clock-names

  - resets

  - reset-names

  - "#power-domain-cells"

  - amlogic,ao-sysctrl



examples:

  - |

    pwrc: power-controller {

          compatible = "amlogic,meson-sm1-pwrc";

          #power-domain-cells = <1>;

          amlogic,ao-sysctrl = <&rti>;

          resets = <&reset_viu>,

                   <&reset_venc>,

                   <&reset_vcbus>,

                   <&reset_bt656>,

                   <&reset_rdma>,

                   <&reset_venci>,

                   <&reset_vencp>,

                   <&reset_vdac>,

                   <&reset_vdi6>,

                   <&reset_vencl>,

                   <&reset_vid_lock>;

          reset-names = "viu", "venc", "vcbus", "bt656",

                        "rdma", "venci", "vencp", "vdac",

                        "vdi6", "vencl", "vid_lock";

          clocks = <&clk_vpu>, <&clk_vapb>;

          clock-names = "vpu", "vapb";

    };

Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt

+1 −0
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@@ -11,6 +11,7 @@ Required properties: 
			"amlogic,meson8b-clk-measure" for Meson8b SoCs

			"amlogic,meson-axg-clk-measure" for AXG SoCs

			"amlogic,meson-g12a-clk-measure" for G12a SoCs

			"amlogic,meson-sm1-clk-measure" for SM1 SoCs

- reg: base address and size of the Clock Measurer register space.



Example:

drivers/soc/amlogic/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -37,6 +37,17 @@ config MESON_GX_PM_DOMAINS 
	  Say yes to expose Amlogic Meson GX Power Domains as

	  Generic Power Domains.



config MESON_EE_PM_DOMAINS

	bool "Amlogic Meson Everything-Else Power Domains driver"

	depends on ARCH_MESON || COMPILE_TEST

	depends on PM && OF

	default ARCH_MESON

	select PM_GENERIC_DOMAINS

	select PM_GENERIC_DOMAINS_OF

	help

	  Say yes to expose Amlogic Meson Everything-Else Power Domains as

	  Generic Power Domains.



config MESON_MX_SOCINFO

	bool "Amlogic Meson MX SoC Information driver"

	depends on ARCH_MESON || COMPILE_TEST

drivers/soc/amlogic/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -4,3 +4,4 @@ obj-$(CONFIG_MESON_CLK_MEASURE) += meson-clk-measure.o 
obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o

obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o

obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o

obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o

drivers/soc/amlogic/meson-clk-measure.c

+147 −1
Original line number Diff line number Diff line
@@ -11,6 +11,8 @@ 
#include <linux/debugfs.h>

#include <linux/regmap.h>



static DEFINE_MUTEX(measure_lock);



#define MSR_CLK_DUTY		0x0

#define MSR_CLK_REG0		0x4

#define MSR_CLK_REG1		0x8
@@ -322,6 +324,8 @@ static struct meson_msr_id clk_msr_g12a[CLK_MSR_MAX] = { 
	CLK_MSR_ID(84, "co_tx"),

	CLK_MSR_ID(89, "hdmi_todig"),

	CLK_MSR_ID(90, "hdmitx_sys"),

	CLK_MSR_ID(91, "sys_cpub_div16"),

	CLK_MSR_ID(92, "sys_pll_cpub_div16"),

	CLK_MSR_ID(94, "eth_phy_rx"),

	CLK_MSR_ID(95, "eth_phy_pll"),

	CLK_MSR_ID(96, "vpu_b"),
@@ -353,6 +357,136 @@ static struct meson_msr_id clk_msr_g12a[CLK_MSR_MAX] = { 
	CLK_MSR_ID(122, "audio_pdm_dclk"),

};



static struct meson_msr_id clk_msr_sm1[CLK_MSR_MAX] = {

	CLK_MSR_ID(0, "ring_osc_out_ee_0"),

	CLK_MSR_ID(1, "ring_osc_out_ee_1"),

	CLK_MSR_ID(2, "ring_osc_out_ee_2"),

	CLK_MSR_ID(3, "ring_osc_out_ee_3"),

	CLK_MSR_ID(4, "gp0_pll"),

	CLK_MSR_ID(5, "gp1_pll"),

	CLK_MSR_ID(6, "enci"),

	CLK_MSR_ID(7, "clk81"),

	CLK_MSR_ID(8, "encp"),

	CLK_MSR_ID(9, "encl"),

	CLK_MSR_ID(10, "vdac"),

	CLK_MSR_ID(11, "eth_tx"),

	CLK_MSR_ID(12, "hifi_pll"),

	CLK_MSR_ID(13, "mod_tcon"),

	CLK_MSR_ID(14, "fec_0"),

	CLK_MSR_ID(15, "fec_1"),

	CLK_MSR_ID(16, "fec_2"),

	CLK_MSR_ID(17, "sys_pll_div16"),

	CLK_MSR_ID(18, "sys_cpu_div16"),

	CLK_MSR_ID(19, "lcd_an_ph2"),

	CLK_MSR_ID(20, "rtc_osc_out"),

	CLK_MSR_ID(21, "lcd_an_ph3"),

	CLK_MSR_ID(22, "eth_phy_ref"),

	CLK_MSR_ID(23, "mpll_50m"),

	CLK_MSR_ID(24, "eth_125m"),

	CLK_MSR_ID(25, "eth_rmii"),

	CLK_MSR_ID(26, "sc_int"),

	CLK_MSR_ID(27, "in_mac"),

	CLK_MSR_ID(28, "sar_adc"),

	CLK_MSR_ID(29, "pcie_inp"),

	CLK_MSR_ID(30, "pcie_inn"),

	CLK_MSR_ID(31, "mpll_test_out"),

	CLK_MSR_ID(32, "vdec"),

	CLK_MSR_ID(34, "eth_mpll_50m"),

	CLK_MSR_ID(35, "mali"),

	CLK_MSR_ID(36, "hdmi_tx_pixel"),

	CLK_MSR_ID(37, "cdac"),

	CLK_MSR_ID(38, "vdin_meas"),

	CLK_MSR_ID(39, "bt656"),

	CLK_MSR_ID(40, "arm_ring_osc_out_4"),

	CLK_MSR_ID(41, "eth_rx_or_rmii"),

	CLK_MSR_ID(42, "mp0_out"),

	CLK_MSR_ID(43, "fclk_div5"),

	CLK_MSR_ID(44, "pwm_b"),

	CLK_MSR_ID(45, "pwm_a"),

	CLK_MSR_ID(46, "vpu"),

	CLK_MSR_ID(47, "ddr_dpll_pt"),

	CLK_MSR_ID(48, "mp1_out"),

	CLK_MSR_ID(49, "mp2_out"),

	CLK_MSR_ID(50, "mp3_out"),

	CLK_MSR_ID(51, "sd_emmc_c"),

	CLK_MSR_ID(52, "sd_emmc_b"),

	CLK_MSR_ID(53, "sd_emmc_a"),

	CLK_MSR_ID(54, "vpu_clkc"),

	CLK_MSR_ID(55, "vid_pll_div_out"),

	CLK_MSR_ID(56, "wave420l_a"),

	CLK_MSR_ID(57, "wave420l_c"),

	CLK_MSR_ID(58, "wave420l_b"),

	CLK_MSR_ID(59, "hcodec"),

	CLK_MSR_ID(60, "arm_ring_osc_out_5"),

	CLK_MSR_ID(61, "gpio_msr"),

	CLK_MSR_ID(62, "hevcb"),

	CLK_MSR_ID(63, "dsi_meas"),

	CLK_MSR_ID(64, "spicc_1"),

	CLK_MSR_ID(65, "spicc_0"),

	CLK_MSR_ID(66, "vid_lock"),

	CLK_MSR_ID(67, "dsi_phy"),

	CLK_MSR_ID(68, "hdcp22_esm"),

	CLK_MSR_ID(69, "hdcp22_skp"),

	CLK_MSR_ID(70, "pwm_f"),

	CLK_MSR_ID(71, "pwm_e"),

	CLK_MSR_ID(72, "pwm_d"),

	CLK_MSR_ID(73, "pwm_c"),

	CLK_MSR_ID(74, "arm_ring_osc_out_6"),

	CLK_MSR_ID(75, "hevcf"),

	CLK_MSR_ID(76, "arm_ring_osc_out_7"),

	CLK_MSR_ID(77, "rng_ring_osc_0"),

	CLK_MSR_ID(78, "rng_ring_osc_1"),

	CLK_MSR_ID(79, "rng_ring_osc_2"),

	CLK_MSR_ID(80, "rng_ring_osc_3"),

	CLK_MSR_ID(81, "vapb"),

	CLK_MSR_ID(82, "ge2d"),

	CLK_MSR_ID(83, "co_rx"),

	CLK_MSR_ID(84, "co_tx"),

	CLK_MSR_ID(85, "arm_ring_osc_out_8"),

	CLK_MSR_ID(86, "arm_ring_osc_out_9"),

	CLK_MSR_ID(87, "mipi_dsi_phy"),

	CLK_MSR_ID(88, "cis2_adapt"),

	CLK_MSR_ID(89, "hdmi_todig"),

	CLK_MSR_ID(90, "hdmitx_sys"),

	CLK_MSR_ID(91, "nna_core"),

	CLK_MSR_ID(92, "nna_axi"),

	CLK_MSR_ID(93, "vad"),

	CLK_MSR_ID(94, "eth_phy_rx"),

	CLK_MSR_ID(95, "eth_phy_pll"),

	CLK_MSR_ID(96, "vpu_b"),

	CLK_MSR_ID(97, "cpu_b_tmp"),

	CLK_MSR_ID(98, "ts"),

	CLK_MSR_ID(99, "arm_ring_osc_out_10"),

	CLK_MSR_ID(100, "arm_ring_osc_out_11"),

	CLK_MSR_ID(101, "arm_ring_osc_out_12"),

	CLK_MSR_ID(102, "arm_ring_osc_out_13"),

	CLK_MSR_ID(103, "arm_ring_osc_out_14"),

	CLK_MSR_ID(104, "arm_ring_osc_out_15"),

	CLK_MSR_ID(105, "arm_ring_osc_out_16"),

	CLK_MSR_ID(106, "ephy_test"),

	CLK_MSR_ID(107, "au_dac_g128x"),

	CLK_MSR_ID(108, "audio_locker_out"),

	CLK_MSR_ID(109, "audio_locker_in"),

	CLK_MSR_ID(110, "audio_tdmout_c_sclk"),

	CLK_MSR_ID(111, "audio_tdmout_b_sclk"),

	CLK_MSR_ID(112, "audio_tdmout_a_sclk"),

	CLK_MSR_ID(113, "audio_tdmin_lb_sclk"),

	CLK_MSR_ID(114, "audio_tdmin_c_sclk"),

	CLK_MSR_ID(115, "audio_tdmin_b_sclk"),

	CLK_MSR_ID(116, "audio_tdmin_a_sclk"),

	CLK_MSR_ID(117, "audio_resample"),

	CLK_MSR_ID(118, "audio_pdm_sys"),

	CLK_MSR_ID(119, "audio_spdifout_b"),

	CLK_MSR_ID(120, "audio_spdifout"),

	CLK_MSR_ID(121, "audio_spdifin"),

	CLK_MSR_ID(122, "audio_pdm_dclk"),

	CLK_MSR_ID(123, "audio_resampled"),

	CLK_MSR_ID(124, "earcrx_pll"),

	CLK_MSR_ID(125, "earcrx_pll_test"),

	CLK_MSR_ID(126, "csi_phy0"),

	CLK_MSR_ID(127, "csi2_data"),

};



static int meson_measure_id(struct meson_msr_id *clk_msr_id,

			       unsigned int duration)

{
@@ -360,6 +494,10 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id, 
	unsigned int val;

	int ret;



	ret = mutex_lock_interruptible(&measure_lock);

	if (ret)

		return ret;



	regmap_write(priv->regmap, MSR_CLK_REG0, 0);



	/* Set measurement duration */
@@ -377,8 +515,10 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id, 


	ret = regmap_read_poll_timeout(priv->regmap, MSR_CLK_REG0,

				       val, !(val & MSR_BUSY), 10, 10000);

	if (ret)

	if (ret) {

		mutex_unlock(&measure_lock);

		return ret;

	}



	/* Disable */

	regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_ENABLE, 0);
@@ -386,6 +526,8 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id, 
	/* Get the value in multiple of gate time counts */

	regmap_read(priv->regmap, MSR_CLK_REG2, &val);



	mutex_unlock(&measure_lock);



	if (val >= MSR_VAL_MASK)

		return -EINVAL;
@@ -533,6 +675,10 @@ static const struct of_device_id meson_msr_match_table[] = { 
		.compatible = "amlogic,meson-g12a-clk-measure",

		.data = (void *)clk_msr_g12a,

	},

	{

		.compatible = "amlogic,meson-sm1-clk-measure",

		.data = (void *)clk_msr_sm1,

	},

	{ /* sentinel */ }

};