Loading Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txtdeleted 100644 → 0 +0 −46 Original line number Diff line number Diff line Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 are the only ones which don't need a pinctrl driver. BCM6338 have 8-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6345 have 16-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. Required properties: - compatible: should be "brcm,bcm6345-gpio" - reg-names: must contain "dat" - data register "dirout" - direction (output) register - reg: address + size pairs describing the GPIO register sets; order must correspond with the order of entries in reg-names - #gpio-cells: must be set to 2. The first cell is the pin number and the second cell is used to specify the gpio polarity: 0 = active high 1 = active low - gpio-controller: Marks the device node as a gpio controller. Optional properties: - native-endian: use native endian memory. Examples: - BCM6338: gpio: gpio-controller@fffe0407 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0407 1>, <0xfffe040f 1>; #gpio-cells = <2>; gpio-controller; }; - BCM6345: gpio: gpio-controller@fffe0406 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0406 2>, <0xfffe040a 2>; native-endian; #gpio-cells = <2>; gpio-controller; }; Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml 0 → 100644 +86 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6345 GPIO controller maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: |+ Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers. These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 are the only ones which don't need a pinctrl driver. BCM6338 have 8-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6345 have 16-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. properties: compatible: enum: - brcm,bcm6318-gpio - brcm,bcm6328-gpio - brcm,bcm6345-gpio - brcm,bcm6358-gpio - brcm,bcm6362-gpio - brcm,bcm6368-gpio - brcm,bcm63268-gpio gpio-controller: true "#gpio-cells": const: 2 gpio-ranges: maxItems: 1 native-endian: true reg: maxItems: 2 reg-names: items: - const: dirout - const: dat required: - compatible - reg - reg-names - gpio-controller - '#gpio-cells' additionalProperties: false examples: - | gpio@fffe0406 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0406 2>, <0xfffe040a 2>; native-endian; gpio-controller; #gpio-cells = <2>; }; - | gpio@0 { compatible = "brcm,bcm63268-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 52>; #gpio-cells = <2>; }; Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml 0 → 100644 +177 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6318 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM6318 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm6318-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm6318-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6318-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; gpio@0 { compatible = "brcm,bcm6318-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 50>; #gpio-cells = <2>; }; pinctrl: pinctrl@10 { compatible = "brcm,bcm6318-pinctrl"; reg = <0x18 0x10>, <0x54 0x18>; pinctrl_ephy0_spd_led: ephy0_spd_led-pins { function = "ephy0_spd_led"; pins = "gpio0"; }; pinctrl_ephy1_spd_led: ephy1_spd_led-pins { function = "ephy1_spd_led"; pins = "gpio1"; }; pinctrl_ephy2_spd_led: ephy2_spd_led-pins { function = "ephy2_spd_led"; pins = "gpio2"; }; pinctrl_ephy3_spd_led: ephy3_spd_led-pins { function = "ephy3_spd_led"; pins = "gpio3"; }; pinctrl_ephy0_act_led: ephy0_act_led-pins { function = "ephy0_act_led"; pins = "gpio4"; }; pinctrl_ephy1_act_led: ephy1_act_led-pins { function = "ephy1_act_led"; pins = "gpio5"; }; pinctrl_ephy2_act_led: ephy2_act_led-pins { function = "ephy2_act_led"; pins = "gpio6"; }; pinctrl_ephy3_act_led: ephy3_act_led-pins { function = "ephy3_act_led"; pins = "gpio7"; }; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio6"; }; pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio7"; }; }; pinctrl_inet_act_led: inet_act_led-pins { function = "inet_act_led"; pins = "gpio8"; }; pinctrl_inet_fail_led: inet_fail_led-pins { function = "inet_fail_led"; pins = "gpio9"; }; pinctrl_dsl_led: dsl_led-pins { function = "dsl_led"; pins = "gpio10"; }; pinctrl_post_fail_led: post_fail_led-pins { function = "post_fail_led"; pins = "gpio11"; }; pinctrl_wlan_wps_led: wlan_wps_led-pins { function = "wlan_wps_led"; pins = "gpio12"; }; pinctrl_usb_pwron: usb_pwron-pins { function = "usb_pwron"; pins = "gpio13"; }; pinctrl_usb_device_led: usb_device_led-pins { function = "usb_device_led"; pins = "gpio13"; }; pinctrl_usb_active: usb_active-pins { function = "usb_active"; pins = "gpio40"; }; }; }; Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml 0 → 100644 +194 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM63268 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm63268-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm63268-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@100000c0 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm63268-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x100000c0 0x80>; ranges = <0 0x100000c0 0x80>; gpio@0 { compatible = "brcm,bcm63268-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 52>; #gpio-cells = <2>; }; pinctrl: pinctrl@10 { compatible = "brcm,bcm63268-pinctrl"; reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio0"; }; pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio1"; }; }; pinctrl_hsspi_cs4: hsspi_cs4-pins { function = "hsspi_cs4"; pins = "gpio16"; }; pinctrl_hsspi_cs5: hsspi_cs5-pins { function = "hsspi_cs5"; pins = "gpio17"; }; pinctrl_hsspi_cs6: hsspi_cs6-pins { function = "hsspi_cs6"; pins = "gpio8"; }; pinctrl_hsspi_cs7: hsspi_cs7-pins { function = "hsspi_cs7"; pins = "gpio9"; }; pinctrl_adsl_spi: adsl_spi-pins { pinctrl_adsl_spi_miso: adsl_spi_miso-pins { function = "adsl_spi_miso"; pins = "gpio18"; }; pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { function = "adsl_spi_mosi"; pins = "gpio19"; }; }; pinctrl_vreq_clk: vreq_clk-pins { function = "vreq_clk"; pins = "gpio22"; }; pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { function = "pcie_clkreq_b"; pins = "gpio23"; }; pinctrl_robosw_led_clk: robosw_led_clk-pins { function = "robosw_led_clk"; pins = "gpio30"; }; pinctrl_robosw_led_data: robosw_led_data-pins { function = "robosw_led_data"; pins = "gpio31"; }; pinctrl_nand: nand-pins { function = "nand"; group = "nand_grp"; }; pinctrl_gpio35_alt: gpio35_alt-pins { function = "gpio35_alt"; pin = "gpio35"; }; pinctrl_dectpd: dectpd-pins { function = "dectpd"; group = "dectpd_grp"; }; pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { function = "vdsl_phy_override_0"; group = "vdsl_phy_override_0_grp"; }; pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { function = "vdsl_phy_override_1"; group = "vdsl_phy_override_1_grp"; }; pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { function = "vdsl_phy_override_2"; group = "vdsl_phy_override_2_grp"; }; pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { function = "vdsl_phy_override_3"; group = "vdsl_phy_override_3_grp"; }; pinctrl_dsl_gpio8: dsl_gpio8-pins { function = "dsl_gpio8"; group = "dsl_gpio8"; }; pinctrl_dsl_gpio9: dsl_gpio9-pins { function = "dsl_gpio9"; group = "dsl_gpio9"; }; }; }; Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml 0 → 100644 +162 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM6328 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm6328-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm6328-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6328-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; gpio@0 { compatible = "brcm,bcm6328-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; }; pinctrl: pinctrl@18 { compatible = "brcm,bcm6328-pinctrl"; reg = <0x18 0x10>; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio6"; }; pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio7"; }; }; pinctrl_inet_act_led: inet_act_led-pins { function = "inet_act_led"; pins = "gpio11"; }; pinctrl_pcie_clkreq: pcie_clkreq-pins { function = "pcie_clkreq"; pins = "gpio16"; }; pinctrl_ephy0_spd_led: ephy0_spd_led-pins { function = "led"; pins = "gpio17"; }; pinctrl_ephy1_spd_led: ephy1_spd_led-pins { function = "led"; pins = "gpio18"; }; pinctrl_ephy2_spd_led: ephy2_spd_led-pins { function = "led"; pins = "gpio19"; }; pinctrl_ephy3_spd_led: ephy3_spd_led-pins { function = "led"; pins = "gpio20"; }; pinctrl_ephy0_act_led: ephy0_act_led-pins { function = "ephy0_act_led"; pins = "gpio25"; }; pinctrl_ephy1_act_led: ephy1_act_led-pins { function = "ephy1_act_led"; pins = "gpio26"; }; pinctrl_ephy2_act_led: ephy2_act_led-pins { function = "ephy2_act_led"; pins = "gpio27"; }; pinctrl_ephy3_act_led: ephy3_act_led-pins { function = "ephy3_act_led"; pins = "gpio28"; }; pinctrl_hsspi_cs1: hsspi_cs1-pins { function = "hsspi_cs1"; pins = "hsspi_cs1"; }; pinctrl_usb_port1_device: usb_port1_device-pins { function = "usb_device_port"; pins = "usb_port1"; }; pinctrl_usb_port1_host: usb_port1_host-pins { function = "usb_host_port"; pins = "usb_port1"; }; }; }; Loading
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txtdeleted 100644 → 0 +0 −46 Original line number Diff line number Diff line Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 are the only ones which don't need a pinctrl driver. BCM6338 have 8-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6345 have 16-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. Required properties: - compatible: should be "brcm,bcm6345-gpio" - reg-names: must contain "dat" - data register "dirout" - direction (output) register - reg: address + size pairs describing the GPIO register sets; order must correspond with the order of entries in reg-names - #gpio-cells: must be set to 2. The first cell is the pin number and the second cell is used to specify the gpio polarity: 0 = active high 1 = active low - gpio-controller: Marks the device node as a gpio controller. Optional properties: - native-endian: use native endian memory. Examples: - BCM6338: gpio: gpio-controller@fffe0407 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0407 1>, <0xfffe040f 1>; #gpio-cells = <2>; gpio-controller; }; - BCM6345: gpio: gpio-controller@fffe0406 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0406 2>, <0xfffe040a 2>; native-endian; #gpio-cells = <2>; gpio-controller; };
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml 0 → 100644 +86 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6345 GPIO controller maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: |+ Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers. These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 are the only ones which don't need a pinctrl driver. BCM6338 have 8-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6345 have 16-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data and dirout registers, where GPIO state can be read and/or written, and the direction changed from input to output. properties: compatible: enum: - brcm,bcm6318-gpio - brcm,bcm6328-gpio - brcm,bcm6345-gpio - brcm,bcm6358-gpio - brcm,bcm6362-gpio - brcm,bcm6368-gpio - brcm,bcm63268-gpio gpio-controller: true "#gpio-cells": const: 2 gpio-ranges: maxItems: 1 native-endian: true reg: maxItems: 2 reg-names: items: - const: dirout - const: dat required: - compatible - reg - reg-names - gpio-controller - '#gpio-cells' additionalProperties: false examples: - | gpio@fffe0406 { compatible = "brcm,bcm6345-gpio"; reg-names = "dirout", "dat"; reg = <0xfffe0406 2>, <0xfffe040a 2>; native-endian; gpio-controller; #gpio-cells = <2>; }; - | gpio@0 { compatible = "brcm,bcm63268-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 52>; #gpio-cells = <2>; };
Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml 0 → 100644 +177 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6318 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM6318 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm6318-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm6318-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6318-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; gpio@0 { compatible = "brcm,bcm6318-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 50>; #gpio-cells = <2>; }; pinctrl: pinctrl@10 { compatible = "brcm,bcm6318-pinctrl"; reg = <0x18 0x10>, <0x54 0x18>; pinctrl_ephy0_spd_led: ephy0_spd_led-pins { function = "ephy0_spd_led"; pins = "gpio0"; }; pinctrl_ephy1_spd_led: ephy1_spd_led-pins { function = "ephy1_spd_led"; pins = "gpio1"; }; pinctrl_ephy2_spd_led: ephy2_spd_led-pins { function = "ephy2_spd_led"; pins = "gpio2"; }; pinctrl_ephy3_spd_led: ephy3_spd_led-pins { function = "ephy3_spd_led"; pins = "gpio3"; }; pinctrl_ephy0_act_led: ephy0_act_led-pins { function = "ephy0_act_led"; pins = "gpio4"; }; pinctrl_ephy1_act_led: ephy1_act_led-pins { function = "ephy1_act_led"; pins = "gpio5"; }; pinctrl_ephy2_act_led: ephy2_act_led-pins { function = "ephy2_act_led"; pins = "gpio6"; }; pinctrl_ephy3_act_led: ephy3_act_led-pins { function = "ephy3_act_led"; pins = "gpio7"; }; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio6"; }; pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio7"; }; }; pinctrl_inet_act_led: inet_act_led-pins { function = "inet_act_led"; pins = "gpio8"; }; pinctrl_inet_fail_led: inet_fail_led-pins { function = "inet_fail_led"; pins = "gpio9"; }; pinctrl_dsl_led: dsl_led-pins { function = "dsl_led"; pins = "gpio10"; }; pinctrl_post_fail_led: post_fail_led-pins { function = "post_fail_led"; pins = "gpio11"; }; pinctrl_wlan_wps_led: wlan_wps_led-pins { function = "wlan_wps_led"; pins = "gpio12"; }; pinctrl_usb_pwron: usb_pwron-pins { function = "usb_pwron"; pins = "gpio13"; }; pinctrl_usb_device_led: usb_device_led-pins { function = "usb_device_led"; pins = "gpio13"; }; pinctrl_usb_active: usb_active-pins { function = "usb_active"; pins = "gpio40"; }; }; };
Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml 0 → 100644 +194 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM63268 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm63268-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm63268-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@100000c0 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm63268-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x100000c0 0x80>; ranges = <0 0x100000c0 0x80>; gpio@0 { compatible = "brcm,bcm63268-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 52>; #gpio-cells = <2>; }; pinctrl: pinctrl@10 { compatible = "brcm,bcm63268-pinctrl"; reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio0"; }; pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio1"; }; }; pinctrl_hsspi_cs4: hsspi_cs4-pins { function = "hsspi_cs4"; pins = "gpio16"; }; pinctrl_hsspi_cs5: hsspi_cs5-pins { function = "hsspi_cs5"; pins = "gpio17"; }; pinctrl_hsspi_cs6: hsspi_cs6-pins { function = "hsspi_cs6"; pins = "gpio8"; }; pinctrl_hsspi_cs7: hsspi_cs7-pins { function = "hsspi_cs7"; pins = "gpio9"; }; pinctrl_adsl_spi: adsl_spi-pins { pinctrl_adsl_spi_miso: adsl_spi_miso-pins { function = "adsl_spi_miso"; pins = "gpio18"; }; pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { function = "adsl_spi_mosi"; pins = "gpio19"; }; }; pinctrl_vreq_clk: vreq_clk-pins { function = "vreq_clk"; pins = "gpio22"; }; pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { function = "pcie_clkreq_b"; pins = "gpio23"; }; pinctrl_robosw_led_clk: robosw_led_clk-pins { function = "robosw_led_clk"; pins = "gpio30"; }; pinctrl_robosw_led_data: robosw_led_data-pins { function = "robosw_led_data"; pins = "gpio31"; }; pinctrl_nand: nand-pins { function = "nand"; group = "nand_grp"; }; pinctrl_gpio35_alt: gpio35_alt-pins { function = "gpio35_alt"; pin = "gpio35"; }; pinctrl_dectpd: dectpd-pins { function = "dectpd"; group = "dectpd_grp"; }; pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { function = "vdsl_phy_override_0"; group = "vdsl_phy_override_0_grp"; }; pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { function = "vdsl_phy_override_1"; group = "vdsl_phy_override_1_grp"; }; pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { function = "vdsl_phy_override_2"; group = "vdsl_phy_override_2_grp"; }; pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { function = "vdsl_phy_override_3"; group = "vdsl_phy_override_3_grp"; }; pinctrl_dsl_gpio8: dsl_gpio8-pins { function = "dsl_gpio8"; group = "dsl_gpio8"; }; pinctrl_dsl_gpio9: dsl_gpio9-pins { function = "dsl_gpio9"; group = "dsl_gpio9"; }; }; };
Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml 0 → 100644 +162 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings maintainers: - Álvaro Fernández Rojas <noltari@gmail.com> - Jonas Gorski <jonas.gorski@gmail.com> description: Broadcom BCM6328 SoC GPIO system controller which provides a register map for controlling the GPIO and pins of the SoC. properties: "#address-cells": true "#size-cells": true compatible: items: - const: brcm,bcm6328-gpio-sysctl - const: syscon - const: simple-mfd ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^gpio@[0-9a-f]+$": # Child node type: object $ref: "../gpio/brcm,bcm6345-gpio.yaml" description: GPIO controller for the SoC GPIOs. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. "^pinctrl@[0-9a-f]+$": # Child node type: object $ref: "../pinctrl/brcm,bcm6328-pinctrl.yaml" description: Pin controller for the SoC pins. This child node definition should follow the bindings specified in Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml. required: - "#address-cells" - compatible - ranges - reg - "#size-cells" additionalProperties: false examples: - | syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6328-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; gpio@0 { compatible = "brcm,bcm6328-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; }; pinctrl: pinctrl@18 { compatible = "brcm,bcm6328-pinctrl"; reg = <0x18 0x10>; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio6"; }; pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio7"; }; }; pinctrl_inet_act_led: inet_act_led-pins { function = "inet_act_led"; pins = "gpio11"; }; pinctrl_pcie_clkreq: pcie_clkreq-pins { function = "pcie_clkreq"; pins = "gpio16"; }; pinctrl_ephy0_spd_led: ephy0_spd_led-pins { function = "led"; pins = "gpio17"; }; pinctrl_ephy1_spd_led: ephy1_spd_led-pins { function = "led"; pins = "gpio18"; }; pinctrl_ephy2_spd_led: ephy2_spd_led-pins { function = "led"; pins = "gpio19"; }; pinctrl_ephy3_spd_led: ephy3_spd_led-pins { function = "led"; pins = "gpio20"; }; pinctrl_ephy0_act_led: ephy0_act_led-pins { function = "ephy0_act_led"; pins = "gpio25"; }; pinctrl_ephy1_act_led: ephy1_act_led-pins { function = "ephy1_act_led"; pins = "gpio26"; }; pinctrl_ephy2_act_led: ephy2_act_led-pins { function = "ephy2_act_led"; pins = "gpio27"; }; pinctrl_ephy3_act_led: ephy3_act_led-pins { function = "ephy3_act_led"; pins = "gpio28"; }; pinctrl_hsspi_cs1: hsspi_cs1-pins { function = "hsspi_cs1"; pins = "hsspi_cs1"; }; pinctrl_usb_port1_device: usb_port1_device-pins { function = "usb_device_port"; pins = "usb_port1"; }; pinctrl_usb_port1_host: usb_port1_host-pins { function = "usb_host_port"; pins = "usb_port1"; }; }; };
