Commit 7625df9f authored by Jeongtae Park's avatar Jeongtae Park Committed by Will Deacon
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perf: CXL: fix mismatched number of counters mask 



The number of Count Units field is described as 6 bits long
in the CXL 3.0 specification. However, its mask value was
only declared as 5 bits long.

Signed-off-by: default avatarJeongtae Park <jtp.park@samsung.com>
Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230905123309.775854-1-jtp.park@samsung.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent e1df2721

drivers/perf/cxl_pmu.c

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
#include "../cxl/pmu.h"



#define CXL_PMU_CAP_REG			0x0

#define   CXL_PMU_CAP_NUM_COUNTERS_MSK			GENMASK_ULL(4, 0)

#define   CXL_PMU_CAP_NUM_COUNTERS_MSK			GENMASK_ULL(5, 0)

#define   CXL_PMU_CAP_COUNTER_WIDTH_MSK			GENMASK_ULL(15, 8)

#define   CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK		GENMASK_ULL(24, 20)

#define   CXL_PMU_CAP_FILTERS_SUP_MSK			GENMASK_ULL(39, 32)