Commit 7624ffcd authored by Evelyn Tsai's avatar Evelyn Tsai Committed by Felix Fietkau
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wifi: mt76: mt7915: reserve 8 bits for the index of rf registers



The value of regidx of rf registers is combined with WF selection and
offset. Extend the WF selection field from 4 to 8 bits since the
adie index should also be specified.

Signed-off-by: default avatarEvelyn Tsai <evelyn.tsai@mediatek.com>
Signed-off-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 2b685ba7
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+1 −1
Original line number Diff line number Diff line
@@ -963,7 +963,7 @@ mt7915_twt_stats(struct seq_file *s, void *data)
}

/* The index of RF registers use the generic regidx, combined with two parts:
 * WF selection [31:28] and offset [27:0].
 * WF selection [31:24] and offset [23:0].
 */
static int
mt7915_rf_regval_get(void *data, u64 *val)
+2 −2
Original line number Diff line number Diff line
@@ -3447,8 +3447,8 @@ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
		__le32 ofs;
		__le32 data;
	} __packed req = {
		.idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 28))),
		.ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(27, 0))),
		.idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),
		.ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
		.data = set ? cpu_to_le32(*val) : 0,
	};
	struct sk_buff *skb;