Commit 7622384c authored by Michael Straube's avatar Michael Straube Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: remove hal/odm_RegConfig8188E.c 



All remaining functions in hal/odm_RegConfig8188E.c are only used
in hal/HalHWImg8188E_BB.c. Make them static and remove the now empty
file hal/odm_RegConfig8188E.c and the header odm_RegConfig8188E.h.

Signed-off-by: default avatarMichael Straube <straube.linux@gmail.com>
Tested-by: Philipp Hortmann <philipp.g.hortmann@gmail.com> # Edimax N150
Link: https://lore.kernel.org/r/20220926173243.8767-4-straube.linux@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1254b194

drivers/staging/r8188eu/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -10,7 +10,6 @@ r8188eu-y = \ 
		hal/hal_com.o \

		hal/odm.o \

		hal/odm_HWConfig.o \

		hal/odm_RegConfig8188E.o \

		hal/odm_RTL8188E.o \

		hal/rtl8188e_cmd.o \

		hal/rtl8188e_dm.o \

drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c

+50 −0
Original line number Diff line number Diff line
@@ -166,6 +166,13 @@ static u32 array_agc_tab_1t_8188e[] = { 
		0xC78, 0x407F0001,

};



static void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)

{

	rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);

	/*  Add 1us delay between BB/RF register setting. */

	udelay(1);

}



enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)

{

	u32     hex         = 0;
@@ -442,6 +449,30 @@ static u32 array_phy_reg_1t_8188e[] = { 
		0xF00, 0x00000300,

};



static void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)

{

	if (Addr == 0xfe) {

		msleep(50);

	} else if (Addr == 0xfd) {

		mdelay(5);

	} else if (Addr == 0xfc) {

		mdelay(1);

	} else if (Addr == 0xfb) {

		udelay(50);

	} else if (Addr == 0xfa) {

		udelay(5);

	} else if (Addr == 0xf9) {

		udelay(1);

	} else {

		if (Addr == 0xa24)

			pDM_Odm->RFCalibrateInfo.RegA24 = Data;

		rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);



		/*  Add 1us delay between BB/RF register setting. */

		udelay(1);

	}

}



enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)

{

	u32     hex         = 0;
@@ -647,6 +678,25 @@ static u32 array_phy_reg_pg_8188e[] = { 


};



static void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask,

					  u32 Data)

{

	if (Addr == 0xfe)

		msleep(50);

	else if (Addr == 0xfd)

		mdelay(5);

	else if (Addr == 0xfc)

		mdelay(1);

	else if (Addr == 0xfb)

		udelay(50);

	else if (Addr == 0xfa)

		udelay(5);

	else if (Addr == 0xf9)

		udelay(1);

	else

		storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);

}



void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)

{

	u32  hex;

drivers/staging/r8188eu/hal/odm_RegConfig8188E.c

deleted100644 → 0
+0 −54
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* Copyright(c) 2007 - 2011 Realtek Corporation. */



#include "../include/drv_types.h"



void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)

{

	rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);

	/*  Add 1us delay between BB/RF register setting. */

	udelay(1);

}



void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

				   u32 Bitmask, u32 Data)

{

	if (Addr == 0xfe)

		msleep(50);

	else if (Addr == 0xfd)

		mdelay(5);

	else if (Addr == 0xfc)

		mdelay(1);

	else if (Addr == 0xfb)

		udelay(50);

	else if (Addr == 0xfa)

		udelay(5);

	else if (Addr == 0xf9)

		udelay(1);

	else

		storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);

}



void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)

{

	if (Addr == 0xfe) {

		msleep(50);

	} else if (Addr == 0xfd) {

		mdelay(5);

	} else if (Addr == 0xfc) {

		mdelay(1);

	} else if (Addr == 0xfb) {

		udelay(50);

	} else if (Addr == 0xfa) {

		udelay(5);

	} else if (Addr == 0xf9) {

		udelay(1);

	} else {

		if (Addr == 0xa24)

			pDM_Odm->RFCalibrateInfo.RegA24 = Data;

		rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);



		/*  Add 1us delay between BB/RF register setting. */

		udelay(1);

	}

}

drivers/staging/r8188eu/include/odm_RegConfig8188E.h

deleted100644 → 0
+0 −16
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */

/* Copyright(c) 2007 - 2011 Realtek Corporation. */



#ifndef __INC_ODM_REGCONFIG_H_8188E

#define __INC_ODM_REGCONFIG_H_8188E



void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

			    u32 Bitmask, u32 Data);



void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

				   u32 Bitmask, u32 Data);



void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

			    u32 Bitmask, u32 Data);



#endif

drivers/staging/r8188eu/include/rtl8188e_hal.h

+0 −1
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ 
#include "HalHWImg8188E_MAC.h"

#include "HalHWImg8188E_RF.h"

#include "HalHWImg8188E_BB.h"

#include "odm_RegConfig8188E.h"

#include "odm_RTL8188E.h"



#define DRVINFO_SZ	4 /*  unit is 8bytes */