Commit 761c6d7e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARC fixes from Vineet Gupta:

 - Fix FPU_STATUS update

 - Update my email address

 - Other spellos and fixes

* tag 'arc-5.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  MAINTAINERS: update Vineet's email address
  ARC: fp: set FPU_STATUS.FWE to enable FPU_STATUS update on context switch
  ARC: Fix CONFIG_STACKDEPOT
  arc: Fix spelling mistake and grammar in Kconfig
  arc: Prefer unsigned int to bare use of unsigned
parents 9e723c53 669d9421
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+1 −1
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@@ -17815,7 +17815,7 @@ F: include/linux/sync_file.h
F:	include/uapi/linux/sync_file.h
SYNOPSYS ARC ARCHITECTURE
M:	Vineet Gupta <vgupta@synopsys.com>
M:	Vineet Gupta <vgupta@kernel.org>
L:	linux-snps-arc@lists.infradead.org
S:	Supported
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git
+1 −1
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@@ -409,7 +409,7 @@ choice
	help
	  Depending on the configuration, CPU can contain DSP registers
	  (ACC0_GLO, ACC0_GHI, DSP_BFLY0, DSP_CTRL, DSP_FFT_CTRL).
	  Bellow is options describing how to handle these registers in
	  Below are options describing how to handle these registers in
	  interrupt entry / exit and in context switch.

config ARC_DSP_NONE
+1 −1
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@@ -24,7 +24,7 @@
 */
static inline __sum16 csum_fold(__wsum s)
{
	unsigned r = s << 16 | s >> 16;	/* ror */
	unsigned int r = s << 16 | s >> 16;	/* ror */
	s = ~s;
	s -= r;
	return s >> 16;
+1 −1
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@@ -123,7 +123,7 @@ static const char * const arc_pmu_ev_hw_map[] = {
#define C(_x)			PERF_COUNT_HW_CACHE_##_x
#define CACHE_OP_UNSUPPORTED	0xffff

static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
static const unsigned int arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
	[C(L1D)] = {
		[C(OP_READ)] = {
			[C(RESULT_ACCESS)]	= PERF_COUNT_ARC_LDC,
+6 −3
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@@ -57,23 +57,26 @@ void fpu_save_restore(struct task_struct *prev, struct task_struct *next)

void fpu_init_task(struct pt_regs *regs)
{
	const unsigned int fwe = 0x80000000;

	/* default rounding mode */
	write_aux_reg(ARC_REG_FPU_CTRL, 0x100);

	/* set "Write enable" to allow explicit write to exception flags */
	write_aux_reg(ARC_REG_FPU_STATUS, 0x80000000);
	/* Initialize to zero: setting requires FWE be set */
	write_aux_reg(ARC_REG_FPU_STATUS, fwe);
}

void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
{
	struct arc_fpu *save = &prev->thread.fpu;
	struct arc_fpu *restore = &next->thread.fpu;
	const unsigned int fwe = 0x80000000;

	save->ctrl = read_aux_reg(ARC_REG_FPU_CTRL);
	save->status = read_aux_reg(ARC_REG_FPU_STATUS);

	write_aux_reg(ARC_REG_FPU_CTRL, restore->ctrl);
	write_aux_reg(ARC_REG_FPU_STATUS, restore->status);
	write_aux_reg(ARC_REG_FPU_STATUS, (fwe | restore->status));
}

#endif
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